M24512-WDW Ver la hoja de datos (PDF) - STMicroelectronics

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componentes Descripción

Fabricante

M24512-WDW

512 Kbit and 256 Kbit Serial I²C bus EEPROM with three Chip Enable lines

STMicroelectronics 

Device operation

M24512-W, M24512-R, M24256-BW, M24256-BR

Figure 9. Read mode sequences

CURRENT

ADDRESS

READ

ACK

NO ACK

DEV SEL

DATA OUT

R/W

RANDOM

ADDRESS

READ

ACK

ACK

ACK

ACK

NO ACK

DEV SEL *

BYTE ADDR BYTE ADDR

DEV SEL *

DATA OUT

R/W

R/W

SEQUENTIAL

CURRENT

READ

ACK

ACK

DEV SEL

DATA OUT 1

R/W

ACK

NO ACK

DATA OUT N

SEQUENTIAL

RANDOM

READ

ACK

ACK

ACK

ACK

ACK

DEV SEL *

BYTE ADDR BYTE ADDR

DEV SEL *

DATA OUT 1

R/W

R/W

ACK

NO ACK

DATA OUT N

3.15

AI01105C

1. The seven most significant bits of the Device Select Code of a Random Read (in the 1st and 4th bytes)

must be identical.

Acknowledge in Read Mode

For all Read commands, the device waits, after each byte read, for an acknowledgment

during the 9th bit time. If the bus master does not drive Serial Data (SDA) Low during this

time, the device terminates the data transfer and switches to its Stand-by mode.

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