M27C256B
Figure 2A. DIP Pin Connections
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1
28
2
27
3
26
4
25
5
24
6
23
7
22
M27C256B
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
AI00756
Figure 2C. TSOP Pin Connections
G
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
22
21
28
15
M27C256B
1
14
7
8
AI00614B
A10
E
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
A1
A2
2/15
Figure 2B. LCC Pin Connections
A6
A5
A4
A3
A2 9
A1
A0
NC
Q0
1 32
M27C256B
17
A8
A9
A11
NC
25 G
A10
E
Q7
Q6
AI00757
Warning: NC = Not Connected, DU = Dont’t Use.
DEVICE OPERATION
The operating modes of the M27C256B are listed
in the Operating Modes. A single power supply is
requiredin the read mode. All inputs are TTL levels
except for VPP and 12V on A9 for Electronic Signa-
ture.
Read Mode
The M27C256B has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV) is equalto the delay from E to output (tELQV).
Data is available at the output after delay of tGLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least tAVQV-tGLQV.
Standby Mode
The M27C256B has a standby mode which re-
duces the supplycurrentfrom 30 mA to 100µA. The
M27C256B is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.