MAX16936
36V, 220kHz to 2.2MHz Step-Down Converter
with 28µA Quiescent Current
voltage ripple. So the size of the output capacitor depends
on the maximum ESR required to meet the output voltage
ripple (VRIPPLE(P-P)) specifications:
VRIPPLE (P−P ) = ESR × ILOAD (MAX ) × LIR
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-capacity filter capacitors, such as ceramic
capacitors, size is usually determined by the capacity
needed to prevent voltage droop and voltage rise from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem. However, low capacity filter
capacitors typically have high ESR zeros that can affect
the overall stability.
Rectifier Selection
The device requires an external Schottky diode rectifier
as a freewheeling diode when the device is configured
for skip mode operation. Connect this rectifier close to the
device using short leads and short PCB traces. In FPWM
mode, the Schottky diode helps minimize efficiency loss-
es by diverting the inductor current that would otherwise
flow through the low-side MOSFET. Choose a rectifier
with a voltage rating greater than the maximum expected
input voltage, VSUPSW. Use a low forward-voltage-drop
Schottky rectifier to limit the negative voltage at LX. Avoid
higher than necessary reverse-voltage Schottky rectifiers
that have higher forward-voltage drops.
Compensation Network
The device uses an internal transconductance error ampli-
fier with its inverting input and its output available to the
user for external frequency compensation. The output
capacitor and compensation network determine the loop
stability. The inductor and the output capacitor are chosen
based on performance, size, and cost. Additionally, the
compensation network optimizes the control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required cur-
rent through the external inductor. The device uses the
voltage drop across the high-side MOSFET to sense
inductor current. Current-mode control eliminates the
double pole in the feedback loop caused by the inductor
and output capacitor, resulting in a smaller phase shift
VOUT
R1
gm
R2
VREF
COMP
RC
CF
CC
Figure 4. Compensation Network
and requiring less elaborate error-amplifier compensation
than voltage-mode control. Only a simple single-series
resistor (RC) and capacitor (CC) are required to have a
stable, high-bandwidth loop in applications where ceramic
capacitors are used for output filtering (Figure 4). For other
types of capacitors, due to the higher capacitance and
ESR, the frequency of the zero created by the capacitance
and ESR is lower than the desired closed-loop crossover
frequency. To stabilize a nonceramic output capacitor
loop, add another compensation capacitor (CF) from
COMP to GND to cancel this ESR zero.
The basic regulator loop is modeled as a power modulator,
output feedback divider, and an error amplifier. The power
modulator has a DC gain set by gm O RLOAD, with a pole and
zero pair set by RLOAD, the output capacitor (COUT), and its
ESR. The following equations allow to approximate the value
for the gain of the power modulator (GAINMOD(dc)), neglect-
ing the effect of the ramp stabilization. Ramp stabilization is
necessary when the duty cycle is above 50% and is
internally done for the device.
GAINMOD (d= c) gm × RLOAD
where RLOAD = VOUT/ILOUT(MAX) in I and gm = 35FS.
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
fpMOD =
1Ï€
2
×
COUT
× RLOAD
The output capacitor and its ESR also introduce a zero at:
fzMOD
=
1
2 π × ESR × COUT
Maxim Integrated
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