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MC100EP131FAR2G

3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock

ON Semiconductor 

MC10EP131, MC100EP131

3.3V / 5V ECL Quad D

Flip−Flop with Set, Reset,

and Differential Clock

Description

The MC10/100EP131 is a Quad Master−slaved D flip−flop with

common set and separate resets. The device is an expansion of the

E131 with differential common clock and individual clock enables.

With AC performance faster than the E131 device, the EP131 is ideal

for applications requiring the fastest AC performance available.

Each flip−flop may be clocked separately by holding Common

Clock (CC) LOW and CC HIGH, then using the differential Clock

Enable inputs for clocking (C0−3, C0−3).

Common clocking is achieved by holding the differential inputs

C0−3 LOW and C0−3 HIGH while using the differential Common

Clock (CC) to clock all four flip−flops. When left floating open, any

differential input will disable operation due to input pulldown resistors

forcing an output default state.

Individual asynchronous resets (R0−3) and an asynchronous set

(SET) are provided.

Data enters the master when both CC and C0−3 are LOW, and

transfers to the slave when either CC or C0−3 (or both) go HIGH.

The 100 Series contains temperature compensation.

Features

• 460 ps Typical Propagation Delay

• Maximum Frequency > 3 GHz Typical

• Differential Individual and Common Clocks

• Individual Asynchronous Resets

• Asynchronous Set

• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V

with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V

with VEE = −3.0 V to −5.5 V

• Open Input Default State

• Safety Clamp on Inputs

• Q Output Will Default LOW with Inputs Open or at VEE

• Pb−Free Packages are Available

http://onsemi.com

MARKING

DIAGRAM*

LQFP−32

FA SUFFIX

CASE 873A

MCxxx

EP131

AWLYYWWG

1 32

QFN32

MN SUFFIX

CASE 488AM

1

MCxxx

EP131

AWLYYWWG

G

xxx = 10 or 100

A

= Assembly Location

WL, L = Wafer Lot

YY, Y = Year

WW, W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

© Semiconductor Components Industries, LLC, 2006

1

November, 2006 − Rev. 10

Publication Order Number:

MC10EP131/D

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