2.6 Peripheral device address mapping
Device addresses on the CP chip’s external bus are memory-mapped to the following locations:
Address
0200h
0400h
0800h
1000h
2000h
8000h
Device
Serial port configuration
CAN port configuration
Parallel-word encoder
User-defined
RAM page pointer
Reserved
Description
Contains the configuration data (transmission rate,
parity, stop bits, etc) for the asynchronous serial port
Contains the configuration data (baud rate and node
ID) for the CAN controller
Base address for parallel-word feedback devices
Base address for user-defined I/O devices
Page pointer to external memory
MC55000 Electrical Specification – Preliminary 11/14/2003
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