MSM7664 Ver la hoja de datos (PDF) - Oki Electric Industry

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MSM7664

NTSC/PAL Digital Video Decoder

Oki Electric Industry 

¡ Semiconductor

I2C-bus Interface Input/Output Timing

The basic input/output timing of the I2C-bus is indicated below.

PEDL7664-01

MSM7664

SDA

MSB

SCL

S

1

2

Start condition

7

8

Data line stable: data valid Change of data allowed

9

1

2

ACK

tC_SCL

9

3-8

ACK

P

Stop condition

I2C-bus Timing

SDA

tBFU

SCL P

S

tHD:STA

tLOW

tR

tF

tHD:DAT

tHIGH

tSU:DAT

tHD:STA

S

tSU:STA

P

tSU:STO

Symbol

fSCL

tBUF

tHD: STA

tLOW

tHIGH

tSU: STA

tHD: DAT

tSU: DAT

tR

tF

tSU: STO

Parameter

SCL Frequency

Bus Open Period

Start Condition Hold Time

Clock Low Period

Clock High Period

Start Condition Setup Time

Data Hold Time

Data Setup Time

Line Rise Time

Line Fall Time

Stop Condition Setup Time

Min.

Max.

Unit

0

100

kHz

4.7

ms

4.0

ms

4.7

ms

4.0

ms

4.7

ms

300

ns

250

ns

1

ms

300

ns

4.7

ms

The I2C-bus timing conforms to this table. However, the I2C-bus can operate faster than at the

speeds, specified above. Actually, the SCL frequency is up to about 5 MHz. The hold time and

setup time in that case must conform to the ratio described in the above table.

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