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MT88E43AS Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc

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MT88E43AS Datasheet PDF : 26 Pages
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CMOS MT88E43
Extended Voltage Calling Number
Identification Circuit 2
Features
• Compatible with:
• British Telecom (BT) SIN227 & SIN242
• U.K.’s Cable Communications Association
(CCA) specification TW/P&E/312
• Bellcore GR-30-CORE (formerly known as
TR-NWT-000030) & SR-TSV-002476
• Bellcore "CPE Alerting Signal (CAS)" and BT
"Idle State Tone Alert Signal" detection
• Ring and line reversal detection
• 1200 baud Bell 202 and CCITT V.23 Frequency
Shift Keying (FSK) demodulation
• 3 or 5V ±10% supply voltage
• High input sensitivity (-40dBV Tone and FSK
Detection)
• Selectable 3-wire data interface
(microcontroller or MT88E43 controlled)
• Low power CMOS with powerdown mode
• Input gain adjustable amplifier
• Carrier detect status output
• Uses 3.58 MHz crystal
Applications
• BT Calling Line Identity Presentation (CLIP),
CCA CLIP, and Bellcore Calling Identity
Delivery (CID) systems
ISSUE 3
March 1997
Ordering Information
MT88E43AE 24 Pin Plastic DIP
(0.6 inch package only)
MT88E43AS 24 Pin SOIC
-40 °C to +85 °C
• Feature phones, including Analog Display
Services Interface (ADSI) phones
• Phone set adjunct boxes
• FAX and answering machines
• Database query and Computer Telephony
Integration (CTI) systems
Description
The MT88E43 Calling Number Identification Circuit 2
(ECNIC2) is a low power CMOS integrated circuit
intended for receiving physical layer signals
transmitted according to BT (British Telecom)
SIN227 & SIN242, the U.K.’s CCA (Cable
Communications Association) TW/P&E/312 and
Bellcore GR-30-CORE & SR-TSV-002476
specifications. The MT88E43 is suitable for
applications using a fixed voltage power source
between 3 and 5V ±10%.
FSKen MODE
IN+
IN-
GS
VRef
CAP
PWDN
+
Anti-alias
FSK Bandpass
FSK
Data Timing
-
Filter
Filter
Demodulator
Recovery
To internal
cct.
Bias
Generator
To internal cct.
Oscillator
Alert Signal High
Tone Filter
Alert Signal Low
Tone Filter
Carrier
Detector
Tone
Detection
Algorithm
Interrupt
Generator
Guard
Time
DCLK
DATA
DR
CD
INT
StD
St/GT
ESt
VDD
VSS
OSCin OSCout TRIGin TRIGRC
TRIGout
Figure 1- Functional Block Diagram
5-53

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