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MT90826AV Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc

Número de pieza
componentes Descripción
Fabricante
MT90826AV
ZARLINK
Zarlink Semiconductor Inc 
MT90826AV Datasheet PDF : 46 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MT90826
Quad Digital Switch
Features
• 4,096 × 4,096 channel non-blocking switching at
8.192 or 16.384 Mbps
• Per-channel variable or constant throughput
delay
• Accepts 32 ST-BUS streams of 2.048 Mbps,
4.096 Mbps, 8.192 Mbps or 16.384 Mbps
• Split Rate mode provides a rate conversion option
to convert data from one rate to another rate
• Automatic frame offset delay measurement for
ST-BUS input streams
• Per-stream input delay programming
• Per-stream output advancement programming
• Per-channel high impedance output control
• Bit Error Monitoring on selected ST-BUS input
and output channels.
• Per-channel message mode
• Connection memory block programming
• IEEE-1149.1 (JTAG) Test Port
• 3.3 V local I/O with 5 V tolerant inputs and TTL
compatible outputs
Data Sheet
August 2005
Ordering Information
MT90826AL 160 Pin MQFP
MT90826AG 160 Ball PBGA
MT90826AV 144 Ball LBGA
MT90826AL1 160 Pin MQFP*
*Pb Free Matte Tin
-40°C to +85°C
Trays
Trays
Trays
Trays
Applications
• Medium switching platforms
• CTI application
• Voice/data multiplexer
• Digital cross connects
• WAN access system
• Wireless base stations
VDD VSS
STi0/FEi0
STi1/FEi1
STi31/FEi31
Serial
to
Parallel
Converter
TMS TDI TDO TCK TRST
RESET
Test Port
Multiple Buffer
Data Memory
Internal
Registers
Output
MUX
Connection
Memory
ODE
Parallel
to
Serial
Converter
STo0
STo1
STo31
Timing Unit
Microprocessor Interface
PLLVDD PLLVSS CLK F0i
DS CS R/W A13-A0 DTA D15-D0
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.

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