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NCL30083(2013_02) Ver la hoja de datos (PDF) - ON Semiconductor

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NCL30083 Datasheet PDF : 34 Pages
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NCL30083
Zero Crossing Detection Block
The ZCD pin allows detecting when the drainsource
voltage of the power MOSFET reaches a valley.
A valley is detected when the voltage on pin 1 crosses
below the VZCD(THD) internal threshold.
At startup or in case of extremely damped free
oscillations, the ZCD comparator may not be able to detect
the valleys. To avoid such a situation, the NCL30083
features a TimeOut circuit that generates pulses if the
voltage on ZCD pin stays below the VZCD(THD) threshold
for 6.5 ms.
The Timeout also acts as a substitute clock for the valley
detection and simulates a missing valley in case of too
damped free oscillations.
The 3rd valley
is validated
high
low
The 2nd valley is detected
By the ZCD comparator
high
low
high
low
high
The 3rd valley is not detected
by the ZCD comp
Timeout circuit adds a pulse to
account for the missing 3rd valley
V ZCD
43 V ZCD(THD)
14
2nd, 3rd
12
15 ZCD comp
16 TimeOut
low
17 Clk
Figure 66. Timeout Chronograms
Because of this timeout function, if the ZCD pin or the
auxiliary winding is shorted, the controller will continue
switching leading to improper regulation of the LED
current. Moreover during an output short circuit, the
controller will strive to maintain the constant current
operation.
In order to avoid these scenarios, a secondary timer starts
counting when the ZCD voltage is below the VZCD(short)
threshold. If this timer reaches 90 ms, the controller detects
a fault and enters the autorecovery fault mode (controller
shutsdown and waits 4s before restarting switching).
Line Feedforward
Because of the propagation delays, the MOSFET is not
turnedoff immediately when the current setpoint is
reached. As a result, the primary peak current is higher than
expected and the output current increases. To compensate
the peak current increase brought by the propagation delay,
a positive voltage proportional to the line voltage is added
on the current sense signal. The amount of offset voltage can
be adjusted using the RLFF resistor as shown in Figure 67.
The offset voltage is applied only during the MOSFET
ontime.
This offset voltage is removed at light load during
dimming when the output current drops below 15% of the
programmed output current.
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