NCP362(2009) Ver la hoja de datos (PDF) - ON Semiconductor

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Fabricante

NCP362
(Rev.:2009)

USB Positive Overvoltage and Overcurrent Protection with TVS for VBUS and Low Capacitance ESD Diodes for Data

ON Semiconductor 

NCP362

PCB Recommendations

The NCP362 integrates a 500 mA rated PMOS FET, and

the PCB rules must be respected to properly evacuate the

heat out of the silicon. The UDFN PAD1 must be connected

to ground plane to increase the heat transfer if necessary

from an application standpoint. Of course, in any case, this

pad shall be not connected to any other potential.

By increasing PCB area, the RqJA of the package can be

decreased, allowing higher charge current to fill the battery.

Taking into account that internal bondings (wires

between package and silicon) can handle up to 1 A (higher

than thermal capability), the following calculation shows

two different example of current capability, depending on

PCB area:

• With 280°C/W (without PCB area), allowing DC

current is 500 mA

• With 210°C/W (200 mm2), the charge DC current

allows with a 85°C ambient temperature is:

I = √(TJ-TA)/(RqJA x RDSON)

I = 800 mA

In every case, we recommend to make thermal

measurement on final application board to make sure of the

final Thermal Resistance.

310

290

1 oz C.F.

270

1 oz Sim

250

2 oz C.F.

2 oz Sim

230

210

190

175

150

0 25 50 75 100 125 150 175 200 225 250 275 300 325350

COPPER HEAT SPREADING AREA (mm2)

Figure 29.

Top View

Figure 30. Demo Board Layout

http://onsemi.com

13

Bottom View

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