KM4112 Ver la hoja de datos (PDF) - Fairchild Semiconductor
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KM4112 Datasheet PDF : 9 Pages
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DATA SHEET
KM4112
General Description
The KM4112 is a single supply, general purpose, voltage-
feedback amplifier fabricated on a complementary
bipolar process. The KM4112 offers 7.3MHz unity gain
bandwidth, 9V/µs slew rate, and only 70µA supply
current. It features a rail-to-rail output stage and is
unity gain stable.
The design utilizes a patent pending topology that
provides increased slew rate performance. The common
mode input range extends to 300mV below ground
and to 1.2V below Vs. Exceeding these values will not
cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD
devices will begin to conduct. The output will stay at
the rail during this overdrive condition.
The design uses a Darlington output stage. The out-
put stage is short circuit protected and offers “softâ€
saturation protection that improves recovery time.
The typical circuit schematic is shown in Figure 1.
+Vs
6.8µF
+
2.0
1.5
1.0
0.5 SOT23-5 lead
0
-50 -30 -10 10 30 50 70 90
Ambient Temperature ( C)
Figure 2: Power Derating Curves
Overdrive Recovery
For an amplifier, an overdrive condition occurs when
the output and/or input ranges are exceeded. The
recovery time varies based on whether the input or
output is overdriven and by how much the ranges are
exceeded. The KM4112 will typically recover in less
than 60ns from an overdrive condition. Figure 3
shows the KM4112 in an overdriven condition.
G=5
In
0.01µF
+
Out
KM4112
-
Rf
Rg
Figure 1: Typical Configuration
Power Dissipation
The maximum internal power dissipation allowed is
directly related to the maximum junction temperature.
If the maximum junction temperature exceeds 150°C,
some reliability degradation will occur. If the maximum
junction temperature exceeds 175°C for an extended
time, device failure may occur.
The KM4112 is short circuit protected. However, this
may not guarantee that the maximum junction
temperature (+150°C) is not exceeded under all
conditions. Follow the maximum power derating
curves shown in Figure 2 to ensure proper operation.
Input
Output
Time (2µs/div)
Figure 3: Overdrive Recovery
Driving Capacitive Loads
A small series resistance (Rs) at the output of the
amplifier, illustrated in Figure 4, will improve stability
and settling performance.
+
-
Rf
Rg
Rs
CL RL
Figure 4: Typical Topology for driving
a capacitive load
6
REV. 2 July 2001
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