Application Circuit 2
4V
+5V
(D) DG
10µF
DMUX Mode TTL I/O (When a single power supply is used)
AG Analog
input
AG
AG +5V (A)
2V
1µF
AG
short
short
10µF
1µF
AG
12 11 10 9 8 7 6 5 4 3 2 1
TTL CLK
Clamp voltage
13 CLK/E
14 CLKN/E
15 CLK/T
16 SELECT2
17 VOCLP
18 PS
19 DVCC2
C∗
20 DGND2
21 PAD0
22 PAD1
23 PAD2
24 PAD3
RESETN/E 48
RESET/E 47
RESETN/T 46
SELECT1 45
INV 44
CLKOUT 43
DVCC2 42
C∗
DGND2 41
PBD7 40
PBD6 39
PBD5 38
PBD4 37
25 26 27 28 29 30 31 32 33 34 35 36
C∗
CXA3286R
Short the analog system and digital system at one point immediately
under the A/D converter. See the Notes on Operation.
is the chip capacitor of 0.1µF. Also, C∗ is important to suppress the noise generated
during the TTL output circuit is operating. Place C∗ at the fixed position
between the pins with the shortest distance.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
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