Philips Semiconductors
Controller for power supply
and battery management
Preliminary specification
PCF50603
handbook, full pagewidth
IRQ_N
I2C-bus
(1)
read request &
address
read
INT1
read
INT2
read
INT3
MDB685
Read access can be done with or without incremental addressing.
(1) IRQ_N becomes inactive high as soon as the read sequence of the last INTx register containing an active interrupt starts.
Fig.8 Interrupt timing; no interrupt captured during read sequence.
handbook, full pagewidth
IRQ_N
I2C-bus
(1)
read request &
address
read
INT1
read
INT2
minimal 1 CLK32
read
INT3
MDB686
Read access can be done with or without incremental addressing.
(1) IRQ_N becomes inactive high as soon as the read sequence of the last INTx register containing an active interrupt starts.
Fig.9 Interrupt timing; interrupt captured during read sequence.
2003 Oct 31
14