NXP Semiconductors
PCF85133
Universal LCD driver for low multiplex rates
7.1 Power-on reset
At power-on the PCF85133 resets to the following starting conditions:
• All backplane and segment outputs are set to VLCD
• The selected drive mode is 1:4 multiplex with 1⁄3 bias
• Blinking is switched off
• Input and output bank selectors are reset
• The I2C-bus interface is initialized
• The data pointer and the subaddress counter are cleared (set to logic 0)
• The display is disabled
Remark: Do not transfer data on the I2C-bus for at least 1 ms after a power-on to allow the
reset action to complete.
7.2 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider of three
series resistors between VLCD and VSS. The center resistor can be bypassed to provide a
1⁄2 bias voltage level for the 1:2 multiplex configuration.
7.3 LCD voltage selector
The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by
mode-set commands from the command decoder. The biasing configurations that apply to
the preferred modes of operation, together with the biasing characteristics as functions of
VLCD and the resulting discrimination ratios (D), are given in Table 5.
Table 5. Discrimination ratios
LCD drive mode Number of:
Backplanes Levels
static
1
2
1:2 multiplex
2
3
1:2 multiplex
2
4
1:3 multiplex
3
4
1:4 multiplex
4
4
LCD bias
configuration
static
1⁄2
1⁄3
1⁄3
1⁄3
V------oV--f--f-L-(--RC----MD----S----)
0
0.354
0.333
0.333
0.333
V------oV--n---L(--R-C--M-D----S---)
1
0.791
0.745
0.638
0.577
D = V-V-----oo--f-n-f--((-R-R---M-M---S-S---)-)
∞
2.236
2.236
1.915
1.732
A practical value for VLCD is determined by equating Voff(RMS) with a defined LCD
threshold voltage (Vth), typically when the LCD exhibits approximately 10 % contrast. In
the static drive mode a suitable choice is VLCD > 3Vth.
Multiplex drive modes of 1:3 and 1:4 with 1⁄2 bias are possible but the discrimination and
hence the contrast ratios are smaller.
Bias is calculated by 1-----+1-----a-- , where the values for a are
a = 1 for 1⁄2 bias
a = 2 for 1⁄3 bias
PCF85133_1
Product data sheet
Rev. 1 — 17 February 2009
© NXP B.V. 2009. All rights reserved.
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