MC74HC165AFL1 Ver la hoja de datos (PDF) - ON Semiconductor
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MC74HC165AFL1 Datasheet PDF : 12 Pages
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MC74HC165A
LOGIC DIAGRAM
PIN ASSIGNMENT
PARALLEL
DATA
INPUTS
A 11
B 12
C 13
D 14
E3
F4
G5
SERIAL
DATA
INPUT
H6
SA 10
SERIAL SHIFT/ 1
PARALLEL LOAD
CLOCK 2
CLOCK INHIBIT 15
9 QH
7 QH
SERIAL
DATA
OUTPUTS
PIN 16 = VCC
PIN 8 = GND
SERIAL SHIFT/
PARALLEL LOAD
1
CLOCK 2
E3
F4
G5
H6
QH 7
GND 8
16 VCC
15 CLOCK INHIBIT
14 D
13 C
12 B
11 A
10 SA
9 QH
Serial Shift/
Parallel Load
L
H
H
H
H
H
H
H
FUNCTION TABLE
Inputs
Internal Stages Output
Clock
Clock Inhibit
SA
A–H
QA
QB
QH
X
X
X
a…h
a
b
h
L
L
X
L
QAn
QGn
L
H
X
H
QAn
QGn
L
L
X
L
QAn
QGn
L
H
X
H
QAn
QGn
X
H
X
X
H
X
X
X
No Change
L
L
X
X
No Change
X = don’t care
QAn – QGn = Data shifted from the preceding stage
Operation
Asynchronous Parallel Load
Serial Shift via Clock
Serial Shift via Clock Inhibit
Inhibited Clock
No Clock
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