S6B1713A11-B0CZ Ver la hoja de datos (PDF) - Samsung

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S6B1713A11-B0CZ

65 COM / 132 SEG DRIVER & CONTROLLER FOR STN LCD

Samsung 

S6B1713

65 COM / 132 SEG DRIVER & CONTROLLER FOR STN LCD

MICROPROCESSOR INTERFACE

Table 6. Microprocessor Interface Pin Description

Name

RESETB

PS

MI

CS1B

CS2

RS

RW_WR

I/O

Description

I

Reset input pin

When RESETB is “L”, initialization is executed.

Parallel / Serial data input select input

PS

Interface

mode

Chip

Data /

select instruction

Data

Read / Write Serial clock

I

H

Parallel

CS1B,

CS2

RS

DB0 to DB7

E_RD

RW_WR

-

L

Serial

CS1B,

CS2

RS

SID(DB7)

Write only SCLK(DB6)

*NOTE: In serial mode, it is impossible to read data from the on-chip RAM. And DB0 to DB5

are high impedance and E_RD and RW_WR must be fixed to either “H” or “L”.

Microprocessor interface selects input pin

I

− MI = "H": 6800-series MPU interface

− MI = "L": 8080-series MPU interface

Chip select input pins

I

Data / instruction I/O is enabled only when CS1B is “L” and CS2 is “H”.

When chip select is non-active, DB0 to DB7 may be high impedance.

Register select input pin

I

− RS = "H": DB0 to DB7 are display data

− RS = "L": DB0 to DB7 are control data

Read / Write execution control pin

MI MPU type RW_WR

Description

Read / Write control input pin

H 6800-series

RW

− RW = “H”: read

I

− RW = “L”: write

L 8080-series

Write enable clock input pin

/WR

The data ON DB0 to DB7 are latched at the rising

edge of the /WR signal.

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