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SA7026DH

1.3GHz low voltage fractional-N dual frequency synthesizer

Philips Electronics 

Philips Semiconductors

1.3GHz low voltage fractional-N dual synthesizer

Product specification

SA7026

CHARACTERISTICS

VDDCP = VDD = +3.0V, Tamb = +25°C; unless otherwise specified.

SYMBOL PARAMETER

CONDITIONS

MIN.

TYP.

Supply; pins 3, 13

VDD

VDDCP

IDDTotal

Digital supply voltage

Analog supply voltage

Synthesizer operational total supply current

VDDCP w VDD

VDD = +3.0V

(with main and aux on)

2.7

–

2.7

–

–

7.5

IStandby

Total supply current in power-down mode

RFin main divider input; pins 5, 6

logic levels 0 or VDD

–

1

fVCO

VRFin(rms)

VCO input frequency

AC-coupled input signal level

350

–

Rin (external) = Rs = 50Ω;

–18

–

single-ended drive;

max. limit is indicative

@ 500 to 1300 MHz

ZIRFin

Input impedance (real part)

CIRFin

Typical pin input capacitance

Nmain

Main divider ratio

fPCmax

Maximum loop comparison frequency

AUX reference divider input; pin 12

fVCO = 1.2 GHz

fVCO = 1.2 GHz

indicative, not tested

–

300

–

1

512

–

–

–

fAUXin

VAUXin

Input frequency range

AC-coupled input signal level

20

–

Rin (external) = RS = 50Ω;

–18

–

max. limit is indicative

80

–

ZAUXin

Input impedance (real part)

CAUXin

Typical pin input capacitance

NAUX

Auxiliary division ratio

Reference divider input; pins 15, 16

fVCO = 500 MHz

fVCO = 500 MHz

–

3.9

–

1

128

–

fREFin

VRFin

Input frequency range from TCXO

AC-coupled input signal level

single-ended drive;

max. limit is indicative

5

–

360

–

ZREFin

Input impedance (real part)

CREFin

Typical pin input capacitance

RREF

Reference division ratio

Charge pump current setting resistor input; pin 14

fREF = 20 MHz

fREF = 20 MHz

SA = SM = ”000”

–

10

–

1

4

–

RSET

External resistor from pin to ground

6

7.5

VSET

Regulated voltage at pin

RSET = 7.5 kΩ

–

1.25

Charge pump outputs (including fractional compensation pump); pins 8, 9, 11; RSET = 7.5 kΩ, FC = 80

ICP

Charge pump current ratio to ISET1

Current gain = IPH/ISET

–15

IMATCH

Sink-to-source current matching

VPH = 1/2 VDDCP

–10

IZOUT

Output current variation versus VPH2

VPH in compliance range

–10

ILPH

Charge pump off leakage current

VPH = 1/2 VDDCP

–10

VPH

Charge pump voltage compliance

0.7

–

MAX.

UNIT

5.5

V

5.5

V

8.8

mA

–

µΑ

1300

0

MHz

dBm

–

–

65535

4

Ω

pF

MHz

550

0

632

–

–

16383

MHz

dBm

mVPP

kΩ

pF

40

1300

–

–

1023

MHz

mVPP

kΩ

pF

15

kΩ

–

V

+15

%

+10

%

+10

%

+10

nA

VDDCP–0.8

V

1999 Nov 04

5

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