SAA2521 Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza

componentes Descripción

Fabricante

SAA2521

Masking threshold processor for MPEG layer 1 audio compression applications

Philips Electronics 

Philips Semiconductors

Masking threshold processor for MPEG

layer 1 audio compression applications

Preliminary specification

SAA2521

Power-down Mode Switching

When the potential on the RESET pin (pin 23) is held HIGH

for at least 5TCLK24 clock periods, the device will be reset

after which it will operate in its decoding mode.

The power-down mode is activated when the PWRDWN

pin (pin 30) is held HIGH. The 3-state buffers will be set to

a high impedance while the normal outputs will retain the

state attained prior to this mode being entered. This mode

can only be used if other associated circuits react

accordingly. The power-down mode is de-activated by a

reset action.

Fig.5 shows the operation for the power-down mode

switching.

Table 1 Resolution selection.

RESOL1

0

0

1

1

RESOL0

0

1

0

1

RESOLUTION

16-bits

18-bits

14-bits

15-bits

PWRDWN

RESET

sleep mode active

t rH

MEA659 - 1

TrH > 5TCLK24 = 210 ns (for CLK24 = 24.576 MHz) minimum time RESET HIGH

Fig.5 Power-down mode switching.

August 1993

8

Share Link: