SAA7185B Ver la hoja de datos (PDF) - Philips Electronics
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SAA7185B Datasheet PDF : 36 Pages
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Philips Semiconductors
Digital Video Encoders (DENC2-M6)
Preliminary specification
SAA7184; SAA7185B
Table 21 Subaddress 6C
DATA BYTE LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
1
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
ORCV2
0
pin RCV2 is switched to input. Default after reset
1
pin RCV2 is switched to output
CBLF
0
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval). Default
after reset
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1). Default after reset
1
if ORCV2 = HIGH, pin RCV2 provides a ‘composite blanking not’ signal i.e. a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking
Interval, which is defined by FAL and LAL (PRCV2 must be LOW)
PRCV1
ORCV1
TRCV2
SRCV1
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) and as an internal blanking signal
0
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
1
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
0
pin RCV1 is switched to input. Default after reset
1
pin RCV1 is switched to output
0
horizontal synchronization is taken from RCV1 port. Default after reset
1
horizontal synchronization is taken from RCV2 port
−
defines signal type on pin RCV1; see Table 22
Table 22 Logic levels and function of SRCV1
DATA BYTE
SRCV11
0
0
1
SRCV10
0
1
0
1
1
AS OUTPUT AS INPUT
FUNCTION
VS
FS
FSEQ
not applicable
VS
FS
FSEQ
not applicable
vertical sync each field. Default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0) or eighth field (PAL = 1)
Table 23 Subaddress 6D
DATA BYTE
DESCRIPTION
CCEN enables individual line 21 encoding; see Table 24
SRCM defines signal type on pin RCM1; see Table 25
1996 Jul 03
19
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