ST70235A
Figure 1 : Block Diagram
TEST SIGNALS
CLOCK
AFE
INTERFACE
AFE
CONTROL
TEST MODULE
DATA SYMBOL TIMING UNIT
VCXO
DSP
FRONT-END
FFT/IFFT
ROTOR
TRELLIS
CODING
MAPPER/
DEMAPPER
GENERIC
TC
REED/
SOLOMON
INTERFACE
MODULE
AFE CONTROL
INTERFACE
CONTROLLER
INTERFACE
ATM
SPECIFIC TC
UTOPIA
CONTROLLER
GENERAL
BUS
PURPOSE I/Os
Transient Energy Capabilities
ESD (Electronic Discharged) tests have been performed for the Human Body Model (HBM) and for the
Charged Device Model (CDM).
The pins of the device are to be able to withstand minimum 2000V for the HBM and minimum 250V for
CDM.
Latch-up
The maximum sink or source current from any pin is limited to 200mA to prevent latch-up.
ABSOLUTE MAXIMUM RATINGS
Symbol
VDD 3.3
VDD 1.8
Ptot
Tamb
Rth J/A
I3.3
I1.8
Parameter
Supply Voltage
Supply Voltage
Total Power Dissipation
Ambient Temperature 1m/s airflow
Thermal Resistivity
Current Consumption
Current Consumption
Min.
3.0
1.62
0
Typ.
3.3
1.8
300
38
Max.
3.6
1.98
400
70
14
135
Unit
V
V
mW
°C
°C/W
mA
mA
2/28