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WM8940GEFL Ver la hoja de datos (PDF) - Wolfson Microelectronics plc

Número de pieza
componentes Descripción
Fabricante
WM8940GEFL
Wolfson
Wolfson Microelectronics plc 
WM8940GEFL Datasheet PDF : 85 Pages
First Prev 71 72 73 74 75 76 77 78 79 80 Next Last
Pre-Production
REGISTER BIT
ADDRESS
6
LABEL
DACMU
5:3
2
AMUTE
1
0
DACPOL
11 (0Bh)
15:8
7:0 DACVOL
12 (0Ch)
13 (0Dh)
14 (0Eh)
15:0
15:0
15:9
8
HPFEN
7
HPFAPP
6:4 HPFCUT
3:1
0
ADCPOL
15 (0Fh)
15:8
7:0 ADCVOL
16 (10h) 15 NF0_UP
14 NF0_EN
13:0 NF0_A0
17 (11h) 15 NF0_UP
14
DEFAULT
DESCRIPTION
WM8940
REFER TO
0
00
0
0
0
00h
11111111
00h
1
0
000
00
0
00h
11111111
0
0
0000h
0
0
DAC soft mute enable
0 = DACMU disabled
Output Signal
Path
1 = DACMU enabled
Reserved
DAC auto mute enable
0 = auto mute disabled
Output Signal
Path
1 = auto mute enabled
Reserved
DAC Polarity Invert
0 = No inversion
Output Signal
Path
1 = DAC output inverted
Reserved
DAC Digital Volume Control
0000 0000 = Digital Mute
Output Signal
Path
0000 0001 = -127dB
0000 0010 = -126.5dB
... 0.5dB steps up to
1111 1111 = 0dB
Reserved
Reserved
Reserved
High Pass Filter Enable
0=disabled
1=enabled
Analogue to
Digital Converter
(ADC)
Select audio mode or application mode
0=Audio mode (1st order, fc = ~3.7Hz)
1=Application mode (2nd order, fc = HPFCUT)
Analogue to
Digital Converter
(ADC)
Application mode cut-off frequency
See Table 14 for details.
Analogue to
Digital Converter
(ADC)
Reserved
ADC Polarity
0=normal
1=inverted
Analogue to
Digital Converter
(ADC)
Reserved
ADC Digital Volume Control
0000 0000 = Digital Mute
0000 0001 = -127dB
Analogue to
Digital Converter
(ADC)
0000 0010 = -126.5dB
... 0.5dB steps up to
1111 1111 = 0dB
Notch filter 0 update. The notch filter 0 values used Analogue to
internally only update when one of the NF0_UP bits is Digital Converter
set high.
(ADC)
Notch filter 0 enable:
0=Disabled
1=Enabled
Analogue to
Digital Converter
(ADC)
Notch Filter 0 a0 coefficient
Analogue to
Digital Converter
(ADC)
Notch filter 0 update. The notch filter 0 values used Analogue to
internally only update when one of the NF0_UP bits is Digital Converter
set high.
(ADC)
Reserved
w
Pre-Production, Rev 3.0, February 2007
71

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