Preliminary Technical Data
WM8956
Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain =
0dB, 24-bit audio data unless otherwise stated.
PARAMETER
Signal to Noise Ratio
(A-weighted)
(DAC to speaker outputs)
Signal to Noise Ratio
(A-weighted)
(LINNPUT3 and RINPUT3 to
speaker outputs)
Speaker Supply Leakage current
Power Supply Rejection Ratio
(100mV ripple on
SPKVDD1/SPKVDD2 @217Hz)
Analogue Reference Levels
Midrail Reference Voltage
Microphone Bias
Bias Voltage
Bias Current Source
Output Noise Voltage
Digital Input / Output
Input HIGH Level
Input LOW Level
Output HIGH Level
Output LOW Level
Input capacitance
Input leakage
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
SNR
SPKVDD1=SPKVDD2
90
=3.3V; AVDD=3.3V;
RL = 8Ω, ref=2.0Vrms
SPKVDD1=SPKVDD2
92
=5V; AVDD=3.3V;
RL = 8Ω, ref=2.8Vrms
SNR
SPKVDD1=SPKVDD2
90
=3.3V; AVDD=3.3V;
RL = 8Ω, ref=2.0Vrms
SPKVDD1=SPKVDD2
92
=5V; AVDD=3.3V;
RL = 8Ω, ref=2.8Vrms
ISPKVDD
SPKVDD1=SPKVDD2
1
=5V;
All other supplies
disconnected
SPKVDD1=SPKVDD2
1
=5V;
All other supplies 0V
PSRR DAC to speaker playback
80
LINPUT3/RINPUT3 to
80
speaker playback
VMID
–3%
AVDD/2
+3%
VMICBIAS
IMICBIAS
Vn
3mA load current
MBSEL=1
3mA load current
MBSEL=0
1K to 20kHz
–5%
0.9×AVDD
+ 5%
–5% 0.65×AVDD + 5%
3
15
VIH
0.7×DBVDD
VIL
VOH
IOL=1mA
0.9×DBVDD
0.3×DBVDD
VOL
IOH-1mA
0.1×DBVDD
10
-0.9
0.9
UNIT
dB
dB
dB
dB
uA
uA
dB
dB
V
V
V
mA
nV/√Hz
V
V
V
V
pF
uA
w
PTD, July 2007, Rev 2.1
9