WM8956 Ver la hoja de datos (PDF) - Wolfson Microelectronics plc
Número de pieza
componentes Descripción
Fabricante
WM8956
Wolfson Microelectronics plc
WM8956 Datasheet PDF : 80 Pages
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Production Data
REGISTER BIT
ADDRESS
6:0
LABEL
ROUT1VOL[6:0]
R4 (04h) 8:6
Clocking
(1)
5:3 DACDIV[2:0]
2:1 SYSCLKDIV[1:0]
0
CLKSEL
R5 (05h) 8
DAC
7
Control (1)
DACDIV2
6:4
3
DACMU
2:1 DEEMPH[1:0]
0
R6 (06h) 8:7
DAC
6:5
Control (2)
DACPOL[1:0]
4
3
DACSMM
DEFAULT
DESCRIPTION
0000000
000
000
00
0
0
0
000
1
00
0
00
00
0
0
ROUT1 Volume
1111111 = +6dB
… 1dB steps down to
0110000 = -73dB
0101111 to 0000000 = Analogue MUTE
Reserved
DAC Sample rate divider (Also determines
DACLRC in master mode)
000 = SYSCLK / (1.0 * 256)
001 = SYSCLK / (1.5 * 256)
010 = SYSCLK / (2 * 256)
011 = SYSCLK / (3 * 256)
100 = SYSCLK / (4 * 256)
101 = SYSCLK / (5.5 * 256)
110 = SYSCLK / (6 * 256)
111 = Reserved
SYSCLK Pre-divider. Clock source (MCLK or
PLL output) will be divided by this value to
generate SYSCLK.
00 = Divide SYSCLK by 1
01 = Reserved
10 = Divide SYSCLK by 2
11 = Reserved
SYSCLK Selection
0 = SYSCLK derived from MCLK
1 = SYSCLK derived from PLL output
Reserved
DAC 6dB Attenuate Enable
0 = Disabled (0dB)
1 = -6dB Enabled
Reserved
DAC Digital Soft Mute
1 = Mute
0 = No mute (signal active)
De-emphasis Control
11 = 48kHz sample rate
10 = 44.1kHz sample rate
01 = 32kHz sample rate
00 = No de-emphasis
Reserved
Reserved
DAC polarity control:
00 = Polarity not inverted
01 = DAC L inverted
10 = DAC R inverted
11 = DAC L and R inverted
Reserved
DAC Soft Mute Mode
0 = Disabling soft-mute (DACMU=0) will cause
the volume to change immediately to the
LDACVOL / RDACVOL settings
1 = Disabling soft-mute (DACMU=0) will cause
the volume to ramp up gradually to the
LDACVOL / RDACVOL settings
WM8956
REFER TO
Analogue
Outputs
Clocking and
Sample Rates
Clocking and
Sample Rates
Clocking and
Sample Rates
Output Signal
Path
Output Signal
Path
Output Signal
Path
Output Signal
Path
Output Signal
Path
w
PD, November 2011, Rev 4.1
61
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