Micron Confidential and Proprietary
Advance
64Gb, 128Gb, 256Gb, 512Gb Asynchronous/Synchronous NAND
Synchronous Interface Timing Diagrams
Figure 111: ERASE BLOCK
tCS
CE#
CLE
ALE
tCAD
tCAD
tCAD
tCAD
tCAD
CLK
W/R#
DQS
tWHR
tCAD
tDQSD
DQ[7:0]
RDY
60h
aRdodw1
aRdodw2
aRdodw3
D0h
tWB tBERS
70h
READ STATUS
command
tRHW
tDQSHZ
Status Status
Don’t Care
Driven
Figure 112: COPYBACK (1 of 3)
CE#
CLE
ALE
CLK
W/R#
DQS
DQx
RDY
tCAD
tCAD x 5
00h
5 Address
Cycles
35h
or 30h
tWB
tR
tDQSD
tDQSCK
tRHW
tCAD
tDQSHZ
tCADx2
Data
Output
05h
2 Address
Cycles
E0h
Don’t Care
Driven
1
PDF: 09005aef83d2277a
Rev. A 11/09 EN
154
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2009 Micron Technology, Inc. All rights reserved.