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EP2AGX45CF29I6N Datasheet PDF : 380 Pages
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Chapter 11: JTAG Boundary-Scan Testing in Arria II Devices
I/O Voltage Support in a JTAG Chain
11–5
EXTEST_TRAIN Instruction Mode
The instruction code for EXTEST_TRAIN is 0001001111. The EXTEST_TRAIN instruction
behaves like the EXTEST_PULSE instruction with one exception: the output continues to
toggle on the TCK falling edge as long as the TAP controller is in the RUN_TEST/IDLE
state.
1 These two instruction codes are only supported in post-configuration mode for
Arria II GX devices.
1 You must not use the following private instructions as invoking such instructions
potentially damage the device, rendering the device useless:
■ 1100010000
■ 0011100101
■ 0011001001
■ 1100010011
■ 0011100110
■ 0000101010
You must take precaution not to invoke such instructions at any instance. Altera
recommends that you avoid toggling the JTAG pins when the device is not in used.
I/O Voltage Support in a JTAG Chain
The JTAG chain can support several different devices. However, use caution if the
chain contains devices that have different VCCIO levels. The output voltage level of the
TDO pin must meet the specification of the TDI pin it drives.
Table 11–3 and Table 11–4 show board design recommendations to ensure proper
JTAG chain operation.
Table 11–3. Supported TDO/TDI Voltage Combinations for Arria II GX Devices (Part 1 of 2)
Device
TDI Input Buffer
Arria II GX TDO VCCIO Voltage Level in I/O Bank 8C
Power
VCCIO = 3.3 V (1) VCCIO = 3.0 V (1) VCCIO = 2.5 V (2) VCCIO = 1.8 V
VCCIO = 3.3 V
v
v
v
v (3)
VCCIO = 3.0 V
v
v
v
v (3)
Arria II GX
VCCIO = 2.5 V
v
v
v
v (3)
VCCIO = 1.8 V
v
v
v
v (3)
VCCIO = 1.5 V
v
v
v
v (3)
VCCIO = 1.5 V
Level shifter
required
Level shifter
required
Level shifter
required
Level shifter
required
v
December 2013 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration
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