BA10358F/FV,BA10324AF/FV,BA2904SF/FV/FVM,BA2904F/FV/FVM,BA2904HFVM-C,
BA2902SF/FV/KN,BA2902F/FV/KN,BA3404F/FVM
●Circuit Diagram
VCC
VCC
Technical Note
-IN
-IN
VOUT+IN
+IN
VOUT
VEE
VEE
BA10358/BA10324A/BA2904S/BA2904/
BA2902S/BA2902/BA2904H simplified schematic
BA3404 simplified schematic
Fig. 119 Circuit Diagram (one channel only)
●Test circuit1 NULL method
VCC,VEE,EK,Vicm Unit:[V]
Parameter
BA2904S/BA2904 family
BA10358/BA10324A family BA2902S/BA2902 family
VF S1 S2 S3
BA2904HFVM-C
BA3404 family
Calculation
Vcc VEE EK Vicm Vcc VEE EK Vicm VCC VEE EK Vicm
Input Offset Voltage VF1 ON ON OFF 5 0 -1.4 0 5~30 0 -1.4 0 15 -15 0 0
1
Input Offset Current VF2 OFF OFF OFF 5 0 -1.4 0 5 0 -1.4 0 15 -15 0 0
2
VF3 OFF ON
Input Bias Current
OFF 5 0 -1.4 0 5 0 -1.4 0 15 -15 0 0
3
VF4 ON OFF
Large Signal
Voltage Gain
VF5
15 0 -1.4 0 15 0 -1.4 0 15 -15 10 0
ON ON ON
VF6
15 0 -11.4 0 15 0 -11.4 0 15 -15 -10 0
4
Common-mode
Rejection Ratio
VF7
(Input common-mode
Voltage Range)
VF8
ON ON OFF
5
5
0 -1.4 0 5
0 -1.4 3.5 5
0 -1.4 0 15 -15 0 -15
0 -1.4 3.5 15 -15 0 13
5
Power Supply
Rejection Ratio
VF9
5
0 -1.4 0
5 0 -1.4 0
2 -2 0
ON ON OFF
VF10
30 0 -1.4 0 30 0 -1.4 0 15 -15 0
0
0
6
-Calculation-
1. Input Offset Voltage (Vio)
| VF1 |
Vio =
[V]
1 + Rf / Rs
2. Input Offset Current (Iio)
| VF2-VF1 |
Iio =
[A]
Ri ×(1 + Rf / Rs)
3. Input Bias Current (Ib)
| VF4-VF3 |
Ib =
[A]
2×Ri× (1 + Rf / Rs)
4. Large Signal Voltage Gain (Av)
Av = 20×Log ΔEK×(1+Rf /Rs) [dB]
| VF 5-VF 6|
5. Common-mode Rejection Ration (CMRR)
CMRR = 20×Log ΔVicm×(1+Rf /Rs) [dB]
| VF 8-VF 7|
6. Power supply rejection ratio (PSRR)
PSRR = 20×Log ΔVcc×(1+Rf /Rs) [dB]
| VF 10-VF 9|
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C2
0.1[μF]
S1
Vicm
Rs
Ri
50[Ω] 10[kΩ]
50[Ω] 10[kΩ]
Rs
Ri
S2
VCC
DUT
VEE
Rf
50[kΩ]
EK
RK
500[kΩ]
RK 500[kΩ]
S3
C3
1000[pF]
RL
C1
0.1[μF]
+15[V]
NULL
-15[V]
V VF
Fig. 120 Measurement circuit1 (one channel only)
17/24
2009.05 - Rev.A