CY2292(2004) Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY2292 Datasheet PDF : 11 Pages
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CY2292
Switching Characteristics, Industrial 5.0V
Parameter
t1
t3
t4
t5
t6
t7
t8
t9A
t9B
t9C
t9D
t10A
t10B
Name
Output Period
Description
Clock output range, 5V
operation
CY2292I
CY2292FI
Output Duty
Cycle[11]
Rise Time
Fall Time
Output Disable
Time
Output Enable
Time
Skew
CPUCLK Slew
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT > 66 MHz
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT < 66 MHz
Output clock rise time[13]
Output clock fall time[13]
Time for output to enter three-state mode after
SHUTDOWN/OE goes LOW
Time for output to leave three-state mode after
SHUTDOWN/OE goes HIGH
Skew delay between any identical or related
outputs[3, 12, 14]
Frequency transition rate
Min.
11.1
(90 MHz)
12.5
(80 MHz)
40%
Typ.
50%
Max.
13000
(76.923 kHz)
13000
(76.923 kHz)
60%
45% 50%
55%
3
5
2.5
4
10
15
10
15
< 0.25
0.5
1.0
20.0
Clock Jitter[14]
Clock Jitter[14]
Clock Jitter[14]
Clock Jitter[14]
Peak-to-peak period jitter (t9A max. – t9A min.), %
of clock period (fOUT < 4 MHz)
Peak-to-peak period jitter (t9B max. – t9B min.) (4
MHz < fOUT < 16 MHz)
Peak-to-peak period jitter (16 MHz < fOUT < 50 MHz)
Peak-to-peak period jitter (fOUT > 50 MHz)
Lock Time for CPLL Lock Time from Power-up
< 0.5
1
< 0.7
1
< 400
500
< 250
350
<25
50
Lock Time for Lock Time from Power-up
UPLL and SPLL
<0.25
1
Slew Limits
CPU PLL Slew Limits
CY2292I
20
90
CY2292FI
20
80
Unit
ns
ns
ns
ns
ns
ns
ns
MHz/
ms
%
ns
ps
ps
ms
ms
MHz
MHz
Switching Characteristics, Industrial 3.3V
Parameter
Name
t1
Output Period
Output Duty
Cycle[11]
t3
Rise Time
t4
Fall Time
t5
Output Disable
Time
t6
Output Enable
Time
t7
Skew
t8
CPUCLK Slew
Description
Min.
Typ.
Max.
Unit
Clock output range, 3.3V CY2292I
operation
15
(66.6 MHz)
13000
ns
(76.923 kHz)
CY2292FI
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT > 66 MHz
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT < 66 MHz
Output clock rise time[13]
Output clock fall time[13]
16.66
(60 MHz)
13000
ns
(76.923 kHz)
40%
50%
60%
45%
50%
55%
3
5
ns
2.5
4
ns
Time for output to enter three-state mode after
SHUTDOWN/OE goes LOW
10
15
ns
Time for output to leave three-state mode after
SHUTDOWN/OE goes HIGH
10
15
ns
Skew delay between any identical or related
outputs[3, 12, 14]
< 0.25
0.5
ns
Frequency transition rate
1.0
20.0
MHz/ms
Document #: 38-07449 Rev. *B
Page 7 of 11
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