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CY2292FXCT Datasheet PDF : 11 Pages
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CY2292
Electrical Characteristics, Industrial 5.0V
Parameter
Description
VOH
VOL
VIH
VIL
IIH
IIL
IOZ
IDD
IDDS
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Input Voltage[9]
LOW-Level Input Voltage[9]
Input HIGH Current
Input LOW Current
Output Leakage Current
VDD Supply Current[10] Industrial
VShDuDtdPoowwnerMSoudpep[1ly0]Current in
Conditions
IOH = 4.0 mA
IOL = 4.0 mA
Except crystal pins
Except crystal pins
VIN = VDD – 0.5V
VIN = +0.5V
Three-state outputs
VDD = VDD Max., 5V operation
Shutdown active CY2292I/CY2292FI
Min.
2.4
2.0
Typ.
<1
<1
75
10
Max. Unit
V
0.4
V
V
0.8
V
10
µA
10
µA
250
µA
110 mA
100
µA
Electrical Characteristics, Industrial 3.3V
Parameter
Description
Conditions
Min. Typ. Max. Unit
VOH
HIGH-Level Output Voltage IOH = 4.0 mA
VOL
LOW-Level Output Voltage
IOL = 4.0 mA
VIH
HIGH-Level Input Voltage[9] Except crystal pins
VIL
LOW-Level Input Voltage[9] Except crystal pins
IIH
Input HIGH Current
VIN = VDD – 0.5V
IIL
Input LOW Current
VIN = +0.5V
IOZ
Output Leakage Current
Three-state outputs
IDD
VDD Supply Current[10] Indus- VDD = VDD Max., 3.3V operation
trial
2.4
2.0
<1
<1
50
V
0.4
V
V
0.8
V
10
µA
10
µA
250
µA
70
mA
IDDS
VShDuDtdPoowwnerMSoudpep[1ly0]Current in Shutdown active
CY2292I/CY2292FI
10
100
µA
Switching Characteristics, Commercial 5.0V
Parameter
Name
Description
Min.
Typ.
Max.
Unit
t1
Output Period
Clock output range, 5V CY2292
operation
10
(100 MHz)
13000
ns
(76.923 kHz)
CY2292F
11.1
13000
ns
(90 MHz)
(76.923 kHz)
Output Duty Cycle[11]
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT > 66 MHz
40%
50%
60%
Duty cycle for outputs, defined as t2 ÷ t1[12]
fOUT < 66 MHz
45%
50%
55%
t3
Rise Time
Output clock rise time[13]
3
5
ns
t4
Fall Time
Output clock fall time[13]
2.5
4
ns
t5
Output Disable Time Time for output to enter three-state mode
after SHUTDOWN/OE goes LOW
10
15
ns
t6
Output Enable Time
Time for output to leave three-state mode
after SHUTDOWN/OE goes HIGH
10
15
ns
t7
Skew
Skew delay between any identical or
related outputs[3, 12, 14]
< 0.25
0.5
ns
t8
CPUCLK Slew
Frequency transition rate
1.0
20.0
MHz/ms
Notes:
11. XBUF duty cycle depends on XTALIN duty cycle.
12. Measured at 1.4V.
13. Measured between 0.4V and 2.4V.
14. Jitter varies with configuration. All standard configurations sample tested at the factory conform to this limit. For more information on jitter, please refer to the
application note: Jitter in PLL-Based Systems.
Document #: 38-07449 Rev. *C
Page 5 of 11
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