LT1721IS Ver la hoja de datos (PDF) - Linear Technology

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componentes Descripción

Fabricante

LT1721IS

Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs

Linear Technology 

LT1720/LT1721

APPLICATIONS INFORMATION

1000

800

600

400

200

0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

SUPPLY VOLTAGE (V)

1720/21 F08

Figure 8. Timing Skew of Figure 7’s Circuit

56% low duty cycle, sufficient to allow 2ns between the

high pulses. Figure 10 shows the two outputs.

The optional A1 feedback network shown can be used to

force identical output duty cycles. The steady state duty

cycles of both outputs will be 44%. Note, though, that the

addition of this network only adjusts the percentage of

time each output is high to be the same, which can be

important in switching circuits requiring identical settling

times. It cannot adjust the relative phases between the two

outputs to be exactly 180° apart, because the signal at the

input node driven by the crystal is not a pure sinusoid.

Q0

2V/DIV

applications. This circuit works well because of the two

matched delays and rail-to-rail style outputs of the LT1720.

The circuit in Figure 9 shows a crystal oscillator circuit that

generates two nonoverlapping clocks by making full use of

the two independent comparators of the LT1720.

C1 oscillates as before, but with a lower reference level,

C2’s output will toggle at different times. The resistors set

the degree of separation between the output’s high pulses.

With the values shown, each output has a 44% high and

Q1

2V/DIV

20ns/DIV

Figure 10. Nonoverlapping Outputs of Figure 9's Circuit

VCC

2.7V TO 6V

2k

220Ω

10MHz

CRYSTAL (AT-CUT)

620Ω

GROUND

+

CASE

C1

1/2 LT1720

–

2k

1.3k

0.1µF

2.2k

+

C2

1/2 LT1720

–

OPTIONAL—

SEE TEXT

A1

LT1636

0.1µF

1k

OUTPUT 0

100k

0.1µF

100k

OUTPUT 1

1720/21 F09

Figure 9. Crystal-Based Nonoverlapping 10MHz Clock Generator

15

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