M5M44800CJ-5S Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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M5M44800CJ-5S Datasheet PDF : 21 Pages
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MITSUBISHI LSIs
M5M44800CJ,TP-5,-6,-7,-5S,-6S,-7S
FAST PAGE MODE 4194304-BIT (524288-WORD BY 8-BIT) DYNAMIC RAM
FUNCTION
In addition to normal read, write, and read-modify-write operations
the M5M44800CJ, TP provides a number of other functions, e.g.,
fast page mode, RAS-only refresh, and delayed-write. The input
conditions for each are shown in Table 1.
Table 1 Input conditions for each mode
Operation
Read
Write (Early write)
RAS
ACT
ACT
CAS
ACT
ACT
Inputs
W
NAC
ACT
OE
ACT
DNC
Row
address
APD
APD
Column
address
APD
APD
Write (Delayed write)
Read-modify-write
ACT
ACT
ACT
ACT
ACT
ACT
DNC
ACT
APD
APD
APD
APD
RAS only refresh
ACT
NAC
DNC DNC
APD
DNC
Hidden refresh
ACT
CAS before RAS (Extended *) refresh ACT
ACT
ACT
DNC
DNC
ACT
DNC
DNC
DNC
DNC
DNC
Self refresh *
ACT ACT
DNC DNC DNC DNC
Stand-by
NAC DNC
DNC DNC DNC DNC
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : invalid, APD : applied, OPN : open
Input/Output
Input
OPN
Output
VLD
VLD OPN
VLD
IVD
VLD VLD
DNC
OPN
OPN
VLD
DNC
DNC
OPN
OPN
DNC OPN
Refresh Remark
YES
YES
YES
YES
YES
YES
YES
YES
NO
Fast page
mode
identical
BLOCK DIAGRAM
COLUMN ADDRESS
STROBE INPUT CAS
ROW ADDRESS RAS
STROBE INPUT
WRITE CONTROL W
INPUT
A0
A1
A2
A3
A4
ADDRESS INPUTS A5
A6
A7
A8
A9
CLOCK GENERATOR
CIRCUIT
A0~A8
COLUMN DECODER
ROW &
COLUMN
ADDRESS
BUFFER
A0~ ROW
A9 DECODER
SENSE REFRESH
AMPLIFIER & I /O CONTROL
MEMORY CELL
(4194304BITS)
2
M5M44800CJ,TP-5,-5S:Under development
(8)
DATA IN
BUFFER
(8)
DATA OUT
BUFFER
VCC (5V)
VCC (5V)
VSS (0V)
VSS (0V)
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DATA
INPUTS / OUTPUTS
OE OUTPUT ENABLE
INPUT
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