MC56F8323PB Ver la hoja de datos (PDF) - Motorola => Freescale

Número de pieza

componentes Descripción

Fabricante

MC56F8323PB

16-bit Hybrid Controller

Motorola => Freescale 

56F8323 Signal Pins

Table 2-2 56F8323 Signal and Package Information for the 64-Pin LQFP

Signal Name Pin No.

Type

State During

Reset

Signal Description

EXTAL

(GPIOC0)

XTAL

(GPIOC1)

TCK

TMS

TDI

TDO

46

Input

Input

External Crystal Oscillator Input — This input can be

connected to an 8MHz external crystal. If an external clock is

used, XTAL must be used as the input and EXTAL connected

to VSS.

Schmitt

Input/

Output

The input clock can be selected to provide the clock directly

to the core. This input clock can also be selected as the input

clock for the on-chip PLL.

Port C GPIO — This GPIO pin can be individually

programmed as an input or output pin.

After reset, the default state is an EXTAL input with pull-ups

disabled.

47

Output

Output Crystal Oscillator Output — This output can be connected

to an 8MHz external crystal. If an external clock is used,

XTAL must be used as the input and EXTAL connected to

VSS.

Schmitt

Input/

Output

The input clock can be selected to provide the clock directly

to the core. This input clock can also be selected as the input

clock for the on-chip PLL.

Port C GPIO — This GPIO pin can be individually

programmed as an input or output pin.

After reset, the default state is an XTAL input with pull-ups

disabled.

53

Schmitt Input, pulled Test Clock Input — This input pin provides a gated clock to

Input low internally synchronize the test logic and shift serial data to the

JTAG/EOnCE port. The pin is connected internally to a

pull-down resistor. A Schmitt trigger input is used for noise

immunity.

54

Schmitt Input, pulled Test Mode Select Input — This input pin is used to

Input high internally sequence the JTAG TAP controller’s state machine. It is

sampled on the rising edge of TCK and has an on-chip

pull-up resistor.

55

Schmitt Input, pulled Test Data Input — This input pin provides a serial input data

Input high internally stream to the JTAG/EOnCE port. It is sampled on the rising

edge of TCK and has an on-chip pull-up resistor.

56

Output Tri-stated Test Data Output — This tri-stateable output pin provides a

serial output data stream from the JTAG/EOnCE port. It is

driven in the shift-IR and shift-DR controller states, and

changes on the falling edge of TCK.

MOTOROLA

56F8323 Technical Data

13

Preliminary

Share Link: