56F8323 Signal Pins
Table 2-2 56F8323 Signal and Package Information for the 64-Pin LQFP
Signal Name Pin No.
Type
State During
Reset
Signal Description
INDEX0
50
(TA2)
(GPIOB5)
(sys_clk)
HOME0
49
(TA3)
(GPIOB4)
(prescaler_clock)
SCLK0
25
(GPIOB3)
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Output
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input Index — Quadrature Decoder 0 INDEX input
TA2 — Timer A Channel 2
Port B GPIO — This GPIO pin can be individually
programmed as an input or output pin.
Input
Clock Output - can be used to monitor the internal sys_clk
signal (see Section 6.5.7 CLKO Select Register
(SIM_CLKOSR).
After reset, the default state is INDEX0.
Home — Quadrature Decoder 0 HOME input
TA3 — Timer A Channel 3
Port B GPIO — This GPIO pin can be individually
programmed as an input or output pin.
Clock Output - can be used to monitor the internal
prescaler_clock signal (see Section 6.5.7 CLKO Select
Register (SIM_CLKOSR).
After reset, the default state is HOME0.
Tri-stated
SPI 0 Serial Clock — In the master mode, this pin serves as
an output, clocking slaved listeners. In slave mode, this pin
serves as the data clock input. A Schmitt trigger input is used
for noise immunity.
Port B GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is SCLK0.
MOTOROLA
56F8323 Technical Data
15
Preliminary