Advanced Technical Information
HiPerFETTM
Power MOSFETs
Single Die MOSFET
N-Channel Enhancement Mode
Avalanche Rated, High dv/dt, Low trr
Symbol
VDSS
VDGR
VGS
VGSM
ID25
IL(RMS)
IDM
IAR
EAR
EAS
dv/dt
PD
TJ
TJM
Tstg
VISOL
Md
Weight
Test Conditions
TJ = 25°C to 150°C
TJ = 25°C to 150°C; RGS = 1 MΩ
Continuous
Transient
TC = 25°C, Chip capability
Terminal current limit
TC = 25°C, pulse width limited by TJM
TC = 25°C
TC = 25°C
TC = 25°C
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS,
TJ ≤ 150°C, RG = 2 Ω
TC = 25°C
50/60 Hz, RMS t = 1 min
IISOL ≤ 1 mA
t=1s
Mounting torque
Terminal connection torque
IXFN 230N10
D
G
S
S
Maximum Ratings
100
V
100
V
±20
V
±30
V
230
A
100
A
920
A
150
A
64
mJ
4
J
5 V/ns
700
W
-55 ... +150
°C
150
°C
-55 ... +150
°C
2500
V~
3000
V~
1.5/13 Nm/lb.in.
1.5/13 Nm/lb.in.
30
g
Symbol
VDSS
VGH(th)
IGSS
IDSS
RDS(on)
Test Conditions
VGS = 0 V, ID = 3 mA
VDS = VGS, ID = 8 mA
VGS = ±20 VDC, VDS = 0
VDS = VDSS
VGS = 0 V
VGS = 10 V, ID = 0.5 ID25
Pulse test, t ≤ 300 µs,
duty cycle d ≤ 2 %
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
100
2.0
TJ = 25°C
TJ = 125°C
V
4.0 V
±200 nA
100 µA
2 mA
6 mΩ
VDSS
ID25
RDS(on)
trr
= 100
= 230
=6
< 250
V
A
mW
ns
miniBLOC, SOT-227 B (IXFN)
E153432
S
G
S
D
G = Gate
S = Source
D = Drain
Either Source terminal at miniBLOC can be used
as Main or Kelvin Source
Features
International standard packages
miniBLOC, with Aluminium nitride
isolation
Low RDS (on) HDMOSTM process
Rugged polysilicon gate cell structure
Unclamped Inductive Switching (UIS)
rated
Low package inductance
Fast intrinsic Rectifier
Applications
DC-DC converters
Battery chargers
Switched-mode and resonant-mode
power supplies
DC choppers
Temperature and lighting controls
Advantages
Easy to mount
Space savings
High power density
© 1998 IXYS All rights reserved
98548A (9/98)