µPD16326A
SWITCHING CHARACTERISTICS (TA = 25 ˚C, VDD1 = 5.0 V, VDD2 = 130 V, VSS = 0 V, logic CL =
15 pF, driver CL = 50 pF, driver RL = 220 kΩ, tr = tf = 10 ns)
Item
Transmission delay time
Fall time
Rise time
Maximum clock frequency
Input capacitance
Symbol
tPHL1
tPLH1
tPHL2
tPLH2
tTHL
tTLH
fmax
CI
Condition
CLK ↓→ A/B
BLK ↓→ O1 to O32
O1 to O32
O1 to O32
With cascading, Duty = 50 %
MIN.
8.0
TYP.
MAX.
110
110
300
300
600
500
15
Unit
ns
ns
ns
ns
ns
ns
MHz
pF
TIMING REQUIREMENTS (TA = – 40 to +85 ˚C, VDD1 = 4.5 to 5.5 V, VSS = 0 V, tr = tf = 10 ns)
Item
Clock pulse width
Strobe pulse width
Blank pulse width
Data setup time
Data hold time
Clock-strobe time
Strobe-clock time
Strobe-blank time
Symbol
PWCLK
PWSTB
PWBLK
tsetup
thold
tCLK-STB
tSTB-CLK
tSTB-BLK
Condition
CLK ↓→ STB ↑
STB ↓→ CLK ↓
STB ↑→ BLK ↓
MIN. TYP. MAX. Unit
40
ns
80
ns
1 500
ns
15
ns
30
ns
45
ns
45
ns
80
ns
5