DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MK10DN32VLK12 Ver la hoja de datos (PDF) - Freescale Semiconductor

Número de pieza
componentes Descripción
Fabricante
MK10DN32VLK12
Freescale
Freescale Semiconductor 
MK10DN32VLK12 Datasheet PDF : 79 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
General
Table 6. Power consumption operating behaviors (continued)
Symbol Description
Min.
Typ.
Max.
Unit
IDD_VBAT Average current when CPU is not accessing RTC
registers
• @ 1.8V
• @ –40 to 25°C
• @ 70°C
• @ 105°C
• @ 3.0V
0.57
0.67
μA
0.90
1.2
μA
2.4
3.5
μA
• @ –40 to 25°C
• @ 70°C
• @ 105°C
0.67
0.94
μA
1.0
1.4
μA
2.7
3.9
μA
Notes
10
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
each module's specification for its supply current.
2. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
All peripheral clocks disabled.
3. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
peripheral clocks enabled.
4. Max values are measured with CPU executing DSP instructions.
5. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clock. MCG configured for FEI mode.
6. 4 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
disabled. Code executing from flash.
7. 4 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
enabled but peripherals are not in active operation. Code executing from flash.
8. 4 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
disabled.
9. Data reflects devices with 128 KB of RAM. For devices with 64 KB of RAM, power consumption is reduced by 2 μA. For
devices with 32 KB of RAM, power consumption is reduced by 3 μA.
10. Includes 32kHz oscillator current and RTC operation.
5.2.5.1 Diagram: Typical IDD_RUN operating behavior
The following data was measured under these conditions:
• MCG in FBE mode for 50 MHz and lower frequencies. MCG in FEE mode at greater
than 50 MHz frequencies.
• No GPIOs toggled
• Code execution from flash with cache enabled
• For the ALLOFF curve, all peripheral clocks are disabled except FTFL
K10 Sub-Family Data Sheet, Rev. 3, 6/2013.
18
Freescale Semiconductor, Inc.

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]