R5F212A7SDFP-V2 Ver la hoja de datos (PDF) - Renesas Electronics

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R5F212A7SDFP-V2

RENESAS MCU

Renesas Electronics 

REVISION HISTORY R8C/2A Group, R8C/2B Group Hardware Manual

Rev.

1.00

2.00

Date

Page

Description

Summary

Feb 09, 2007 496 Figure 20.9 “any area other than the flash memory” → “the RAM” revised

497 Figure 20.11; “any area other than the flash memory” → “the RAM”,

“15 µs” → “30 µs”, and NOTES 1 and 3 revised

499 20.4.3.4 revised

500 Figure 20.13 revised

501 20.4.3.5 revised

502 Figure 20.15 revised

504 Table 20.6 “FRM00 Register” → “FRM0 Register” revised

506 Table 20.7 revised

514 Table 21.2 revised

515 Table 21.3 and Table 21.4; NOTE1 revised

520 Table 21.11 revised

527 Table 21.17 revised

529 Table 21.21 and Figure 21.11; “i = 0 to 2” revised

531 Table 21.24 revised

533 Table 21.28 revised, Figure 21.16 “i = 0 to 2” revised

535 Table 21.31 revised

536 Table 21.34 revised

537 Table 21.35 and Figure 21.21; “i = 0 to 2” revised

538 22.1.1 and 22.1.2 revised

539 22.2.4 deleted

545 22.3.4.1 and Table 22.1 revised

554 22.3.6 revised

555 22.4 revised

557 22.5.2.2 and 22.5.2.3 added

559 22.7 revised

565 24. Notes on Emulator Debugger added

567 Appendix Figure 2.1 and Appendix Figure 2.2 revised

568 Appendix Figure 3.1 NOTE1 revised

Nov 26, 2007

− “RENESAS TECHNICAL UPDATE” reflected:

TN-16C-A164A/E, TN-16C-A167A/E

All pages “PTLG0064JA-A (64F0G) package” added

2, 4 Table 1.1, Table 1.3 Clock: “Real-time clock (timer RE)” added

3, 5 Table 1.2 and Table 1.4;

• Operating Ambient Temperature: Y version added

• Package: 64-pin FLGA added

NOTE1 added

6, 7 Table 1.5 and Figure 1.1 revised

8, 9 Table 1.6 and Figure 1.2 revised

11 Figure 1.4 “64-pin LQFP Package” added

C-4

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