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Fabricante

MKL33Z128VLH4

Kinetis KL33 With Up To 256 KB Flash 48 MHz Cortex-M0+ Based Microcontroller

Freescale Semiconductor 

Peripheral operating requirements and behaviors

3.8.1 SPI switching specifications

The Serial Peripheral Interface (SPI) provides a synchronous serial bus with master

and slave operations. Many of the transfer attributes are programmable. The following

tables provide timing characteristics for classic SPI timing modes. See the SPI chapter

of the chip's Reference Manual for information about the modified transfer formats

used for communicating with slower peripheral devices.

All timing is shown with respect to 20% VDD and 80% VDD thresholds, unless noted,

as well as input signal transitions of 3 ns and a 30 pF maximum load on all SPI pins.

Table 34. SPI master mode timing on slew rate disabled pads

Num.

1

2

3

4

5

6

7

8

9

10

11

Symbol

fop

tSPSCK

Description

Frequency of operation

SPSCK period

tLead

tLag

tWSPSCK

Enable lead time

Enable lag time

Clock (SPSCK) high or low time

tSU

Data setup time (inputs)

tHI

Data hold time (inputs)

tv

Data valid (after SPSCK edge)

tHO Data hold time (outputs)

tRI

Rise time input

tFI

Fall time input

tRO

Rise time output

tFO

Fall time output

Min.

Max.

fperiph/2048

2 x tperiph

1/2

fperiph/2

2048 x

tperiph

—

1/2

—

tperiph - 30

18

1024 x

tperiph

—

0

—

—

15

0

—

—

tperiph - 25

Unit

Hz

ns

tSPSCK

tSPSCK

ns

ns

ns

ns

ns

ns

Note

1

2

—

—

—

—

—

—

—

—

—

25

ns

—

1. For SPI0 fperiph is the bus clock (fBUS). For SPI1 fperiph is the system clock (fSYS).

2. tperiph = 1/fperiph

Table 35. SPI master mode timing on slew rate enabled pads

Num.

1

2

3

4

5

6

7

Symbol

fop

tSPSCK

Description

Frequency of operation

SPSCK period

Min.

fperiph/2048

2 x tperiph

tLead

tLag

tWSPSCK

Enable lead time

Enable lag time

Clock (SPSCK) high or low time

1/2

1/2

tperiph - 30

tSU

Data setup time (inputs)

96

tHI

Data hold time (inputs)

0

Table continues on the next page...

Max.

fperiph/2

2048 x

tperiph

—

—

1024 x

tperiph

—

—

Unit

Hz

ns

tSPSCK

tSPSCK

ns

ns

ns

Note

1

2

—

—

—

—

—

Kinetis KL33 With Up To 256 KB Flash, Rev3, 08/2014.

41

Freescale Semiconductor, Inc.

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