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VNQ5027AKTR-E

Quad channel high side driver with analog current sense for automotive applications

STMicroelectronics 

VNQ5027AK-E

Electrical specifications

Table 8. Current Sense (8V<VCC<16V) (continued)

Symbol

Parameter

Test conditions

VSENSEH

Analog sense output voltage in

over temperature condition

VCC= 13V; RSENSE= 3.9KΩ

ISENSEH

Analog sense output current in

over temperature condition

VCC= 13V; VSENSE= 5V

tDSENSE1H

Delay response time from

falling edge of CS_DIS pin

VSENSE<4V, 0.5A<Iout<10A

ISENSE= 90% of ISENSE max

(see Figure 4.)

tDSENSE1L

Delay response time from

rising edge of CS_DIS pin

VSENSE<4V, 0.5A<Iout<10A

ISENSE=10% of ISENSE max

(see Figure 4.)

tDSENSE2H

Delay response time from

rising edge of INPUT pin

VSENSE<4V, 0.5A<Iout<10A

ISENSE=90% of ISENSE max

(see Figure 4.)

ΔtDSENSE2H

tDSENSE2L

Delay response time between

rising edge of output current

and rising edge of current

sense

Delay response time from

falling edge of input pin

VSENSE < 4V,

ISENSE = 90% of ISENSEMAX,

IOUT = 90% of IOUTMAX

IOUTMAX=2A (see Figure 5)

VSENSE<4V, 0.5A<Iout<10A

ISENSE=10% of ISENSE max

(see Figure 4.)

1. Parameter guaranteed by design; it is not tested.

Min. Typ. Max. Unit

9

V

8

mA

50 100 µs

5

20 µs

70 300 µs

200 µs

100 250 µs

Table 9.

Symbol

Protection(1)

Parameter

Test conditions

Min. Typ. Max. Unit

IlimH

DC short circuit current VCC=13V

5V<VCC<36V

IlimL

Short circuit current

during thermal cycling

VCC=13V; TR<Tj<TTSD

TTSD

TR

TRS

Shutdown temperature

Reset temperature

Thermal reset of

STATUS

THYST

Thermal hysteresis

(TTSD-TR)

VDEMAG

Turn-off output voltage

clamp

IOUT= 2A; VIN=0; L=6mH

VON

Output voltage drop

limitation

IOUT=0.2A; Tj=-40°C...150°C

(see Figure 9.)

29

42

59

A

59

A

16

A

150 175 200 °C

TRS + 1 TRS + 5

°C

135

°C

7

°C

VCC-41 VCC-46 VCC-52 V

25

mV

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

diagnostic signals must be used together with a proper software strategy. If the device is subjected to

abnormal conditions, this software must limit the duration and number of activation cycles.

Doc ID 12730 Rev 7

11/31

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