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SAA4945H/V1

LIne MEmory noise Reduction IC (LIMERIC)

Philips Electronics 

Philips Semiconductors

LIne MEmory noise Reduction IC

(LIMERIC)

Preliminary specification

SAA4945H

Output signals

YO0 TO YO7 (PINS 38 TO 44 AND 1)

• 8-bit wide digital luminance output bus

• Data format: unsigned, dynamic range between

0 and 255.

UO1 AND UO0 (PINS 37 AND 36)

• Colour difference signal U

• Data format: 2’s complement, dynamic range between

−128 and +127

• Y : U : V format 4 : 1 : 1; see Table 8.

VO1 AND VO0 (PINS 35 AND 34)

• Colour difference signal V

• Data format: 2’s complement, dynamic range between

−128 and +127

• Y : U : V format 4 : 1 : 1; see Table 8.

WEO (PIN 31)

• Write enable output

• Write enable indicates the time when active samples (Y,

U and V) are present

• Timing relation (see Fig.6) depending on write enable

select signal (WES) in status register; to adapt to

different external video memories

• The number of output samples is a multiple of 4

• The write enable output sequence is a copy of the write

enable input sequence of the previous line (see Fig.6)

with a shift of one line

• The last line in field is not processed.

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Va

VRST

WEI

L(n−1)

tVa(min)H

tsu(Va)

t(WE-VRST)LH

L(n)

t(Va-WE)LH

t(Va-VRST)LH

L(0)

L(1)

L(2)

WEO

L(n−2)

L(n−1)

internal flag

to mask

WEO

1 clk cycle

Fig.6 Timing diagram for WEO blanking and Va.

L(0)

L(1)

MGK174

1997 Jun 10

11

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