Data Sheet
3.8
Read Status Register
The Status Register is used to retrieve the status value for the last operation issued. After writing 70h
command to the command register, a read cycle outputs the content of the Status Register to the I/O pins on
the falling edge of CE# or RE#, whichever occurs last. This two-line control allows the system to poll the
progress of each device in multiple memory connections even when R/B# pins are common-wired. Refer to
Section 3.2 on page 29 for specific Status Register definition, and to Figure 6.22 on page 56 for timings.
If the Read Status Register command is issued during multiplane operations then Status Register polling will
return the combined status value related to the outcome of the operation in the two planes according to the
following table:
Status Register Bit
Bit 0, Pass/Fail
Bit 1, Cache Pass/Fail
Composite Status Value
OR
OR
In other words, the Status Register is dynamic; the user is not required to toggle RE# / CE# to update it.
The command register remains in Status Read mode until further commands are issued. Therefore, if the
Status Register is read during a random read cycle, the read command (00h) must be issued before starting
read cycles.
Note: The Read Status Register command shall not be used for concurrent operations in multi-die stack
configurations (single CE#). “Read Status Enhanced” shall be used instead.
3.9 Read Status Enhanced — S34ML02G2 and S34ML04G2
Read Status Enhanced is used to retrieve the status value for a previous operation in the specified plane.
Figure 6.23 on page 57 defines the Read Status Enhanced behavior and timings. The plane and die address
must be specified in the command sequence in order to retrieve the status of the die and the plane of interest.
Refer to Table 3.2 for specific Status Register definitions. The command register remains in Status Read
mode until further commands are issued.
The Status Register is dynamic; the user is not required to toggle RE# / CE# to update it.
3.10
Read Status Register Field Definition
Table 3.2 below lists the meaning of each bit of the Read Status Register and Read Status Enhanced
(S34ML02G2 and S34ML04G2).
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Spansion® SLC NAND Flash Memory for Embedded
S34ML01G2_04G2_10 September 5, 2014