Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Table 6: Pin-out 48 Pin, continued
P5[0] I/O
P5[2] I/O
P4[0] I/O
P4[2] I/O
P4[4] I/O
P4[6] I/O
XRES I
P3[0] I/O
P3[2] I/O
P3[4] I/O
P3[6] I/O
P2[0] I/O
P2[2] I/O
P2[4] I/O
P2[6] I/O
P0[0] I/O
P0[2] I/O
P0[4] I/O
P0[6] I/O
Vcc Power
29 Port 5[0]
30 Port 5[2]
31 Port 4[0]
32 Port 4[2]
33 Port 4[4]
34 Port 4[6]
35 External Reset
36 Port 3[0]
37 Port 3[2]
38 Port 3[4]
39 Port 3[6]
40
Port 2[0] (Non-Multiplexed
Analog Input)
41
Port 2[2] (Non-Multiplexed
Analog Input)
42 Port 2[4] / External AGNDIn
43 Port 2[6] / External VREFIn
44 Port 0[0] (Analog Input)
45
Port 0[2] (Analog Input/Out-
put)
46
Port 0[4] (Analog Input/Out-
put)
47 Port 0[6] (Analog Input)
48 Supply Voltage
P0[7]
1
P0[5]
2
P0[3]
3
P0[1]
4
P2[7]
5
P2[5]
6
P2[3]
7
P2[1]
8
P3[7]
9
P3[5]
10
P3[3]
11
P3[1]
12
SMP
13
P4[7]
14
P4[5]
15
P4[3]
16
P4[1]
17
P5[3]
18
P5[1]
19
P1[7]
20
P1[5]
21
P1[3]
22
XtalIn/SCLK/P1[1]
23
Vss
24
48
47
Vcc
P0[6]
46
P0[4]
45
P0[2]
44
P0[0]
43
42
P2[6]/External Vref IN
P2[4] /External AGNDIN
41
P2[2]
40
P2[0]
39
P3[6]
38
P3[4]
37
P3[2]
36
P3[0]
35
Xres
34
P4[6]
33
P4[4]
32
P4[2]
31
P4[0]
30
P5[2]
29
P5[0]
28
P1[6]
27
P1[4]
26
P1[2]
25
P1[0]/XtalOut/SDATA
Figure 6: 26643 PDIP/SSOP
18
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002