CPU Architecture
2.2.3 Index Register
Table 10: Index Register (CPU_X)
Bit #
POR
Read/
Write
Bit Name
7
0
System1
Data [7]
6
0
System1
Data [6]
5
0
System1
Data [5]
4
0
System1
Data [4]
3
0
System1
Data [3]
2
0
System1
Data [2]
1
0
System1
Data [1]
0
0
System1
Data [0]
Bit [7:0]: Data [7:0] 8-bit data value holds an index for any instruction that uses an indexed addressing mode
1. System - not directly accessible by the user
2.2.4 Stack Pointer Register
Table 11:
Bit #
POR
Read/
Write
Bit Name
Stack Pointer Register (CPU_SP)
7
6
5
0
0
0
System1 System1 System1
Data [7] Data [6] Data [5]
4
0
System1
Data [4]
3
0
System1
Data [3]
2
0
System1
Data [2]
1
0
System1
Data [1]
0
0
System1
Data [0]
Bit [7:0]: Data [7:0] 8-bit data value holds a pointer to the current top-of-stack
1. System - not directly accessible by the user
2.2.5 Program Counter Register
Table 12: Program Counter Register (CPU_PC)
Bit #
POR
Read/
Write
Bit
Name
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Data Data Data Data Data Data Data Data Data Data Data Data Data Data Data Data
[15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
Bit [15:0]: Data [15:0] 16-bit data value is the low-order/high-order byte of the Program Counter
1. System - not directly accessible by the user
2.3 Addressing Modes
2.3.1 Source Immediate
The result of an instruction using this addressing mode is
placed in the A register, the F register, the SP register, or
the X register, which is specified as part of the instruction
opcode. Operand 1 is an immediate value that serves as
a source for the instruction. Arithmetic instructions
require two sources. Instructions using this addressing
mode are two bytes in length.
Table 13: Source Immediate
Opcode
Instruction
Operand 1
Immediate Value
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
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