AT17LV002A-10JU Ver la hoja de datos (PDF) - Atmel Corporation

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AT17LV002A-10JU

FPGA Configuration EEPROM Memory

Atmel Corporation 

Figure 2-8. Block Diagram

SER_EN

WP1(2)

WP2(2)

AT17LV65/128/256/512/010/002/040

POWER ON

RESET

READY(2)

(1)

Notes:

1. This pin is only available on AT17LV65/128/256 devices.

2. This pin is only available on AT17LV512/010/002 devices.

3. The CEO feature is not available on the AT17LV65 device.

5

2321I–CNFG–2/08

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