TX9956C Ver la hoja de datos (PDF) - Toshiba

Número de pieza

componentes Descripción

Fabricante

TX9956C

RISC PROCESSOR

Toshiba 

Preliminary

TX9956CXBG

4.3 PIN FUNCTION

The following is a list of interface, interrupt, and miscellaneous pins available on the TX9956C.

SYSTEM INTERFACE

PIN NAME

SysAD(63:0)

SysCmd(8:0)

SysADC(7:0)

SysCmdP

ValidIn*

ValidOut*

ExtRqst*

Release*

WrRdy*

RdRdy*

I/O

FUNCTION

System address / data bus

I / O A 64-bit address and data bus for communication between the processor and an

external agent.

System command / data identifier bus

I / O A 9-bit bus for command and data identifier transmission between the processor

and an external agent.

System command/data check bus

I/O

A 8-bit bus containing parity check bits for the SysAD bus during data cycles.

I / O Reserved for system command/data identifier bus parity

For the TX9956C this signal is unused on input and zero on output.

Valid input

I The external agent asserts ValidIn* when it is driving a valid address or data on

the SysAD bus and a valid command or data identifier on the SysCmd bus.

Valid output

O The processor asserts ValidOut* when it is driving a valid address or data on the

SysAD bus and a valid command or data identifier on the SysCmd bus.

External request

I

An external agent asserts ExtRqst* to request use of the System interface.

O Release interface

Signals that the system interface needs to submit an external request.

I

Write Ready

Signals that an external agent can now accept a processor write request.

I

Read Ready

Signals that an external agent can now accept a processor read request.

TX9956CXBG 2004-4-25 8

Share Link: