A6259KA Ver la hoja de datos (PDF) - Allegro MicroSystems
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A6259KA Datasheet PDF : 10 Pages
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6259
8-BIT ADDRESSABLE
DMOS POWER DRIVER
RECOMMENDED OPERATING CONDITIONS
over operating temperature range
Logic Supply Voltage Range, VDD ............... 4.5 V to 5.5 V
High-Level Input Voltage, VIH ............................ ≥ 0.85VDD
Low-level input voltage, VIL ................................. ≤0.15VDD
ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V, tir = tif ≤ 10 ns (unless otherwise
specified).
Characteristic
Symbol Test Conditions
Logic Supply Voltage
VDD
Operating
Min.
4.5
Limits
Typ.
Max.
5.0
5.5
Units
V
Output Breakdown
Voltage
V(BR)DSX IO = 1 mA
50
—
—
V
Off-State Output
Current
IDSX
VO = 40 V
VO = 40 V, TA = 125°C
—
0.05
1.0
µA
—
0.15
5.0
µA
Static Drain-Source
rDS(on) IO = 250 mA, VDD = 4.5 V
—
1.3
2.0
Ω
On-State Resistance
IO = 250 mA, VDD = 4.5 V, TA = 125°C
—
2.0
3.2
Ω
IO = 500 mA, VDD = 4.5 V (see note)
—
1.3
2.0
Ω
Nominal Output
Current
IO(nom) VDS(on) = 0.5 V, TA = 85°C
—
250
—
mA
Logic Input Current
Prop. Delay Time
Output Rise Time
IIH
VI = VDD = 5.5 V
IIL
VI = 0, VDD = 5.5 V
tPLH
IO = 250 mA, CL = 30 pF
tPHL
IO = 250 mA, CL = 30 pF
tr
IO = 250 mA, CL = 30 pF
—
—
1.0
µA
—
—
-1.0
µA
—
625
—
ns
—
140
—
ns
—
650
—
ns
Output Fall Time
tf
IO = 250 mA, CL = 30 pF
Supply Current
IDD(off) VDD = 5.5 V, Outputs OFF
IDD(on) VDD = 5.5 V, Outputs ON
Typical Data is at VDD = 5 V and is for design information only.
NOTE — Pulse test, duration ≤ 100 µs, duty cycle ≤ 2%.
—
400
—
ns
—
15
100
µA
—
150
300
µA
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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