DS2482S-100 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS2482S-100 Datasheet PDF : 21 Pages
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DS2482-100: Single-Channel 1-Wire Master
PARAMETER
Write-0 Low Time
SYMBOL
tW0L
Write-0 Recovery Time
tREC0
Reset Low Time
tRSTL
Presence Detect Sample Time
Sampling for Short and
Interrupt
Reset High Time
Presence-Pulse Mask Start
Presence-Pulse Mask Stop
Control Pin (PCTLZ)
Output-Low Voltage
Output-High Voltage
I²C Pins (Note 9) See Figure 10
tMSP
tSI
tRSTH
tppm1
tppm2
VOLP
VOHP
CONDITIONS
Standard
Overdrive
Standard
Overdrive
Standard
Overdrive
Standard
Overdrive
Standard
Overdrive
Standard
Overdrive
(Note 8)
(Note 8)
VCC = 2.9V, 1.2mA load
current
0.4mA load current
LOW Level Input Voltage
VCC = 2.9V to 3.7V
VIL
VCC = 4.5V to 5.5V
HIGH Level Input Voltage
Hysteresis of Schmitt Trigger
Inputs
LOW Level Output Voltage at
3mA Sink Current
Output Fall Time from VIhmin to
VILmax with a Bus Capacitance
from 10pF to 400pF
Pulse Width of Spikes that are
Suppressed by the Input Filter
Input Current Each I/O Pin with
an Input Voltage Between
0.1VCCmax and 0.9VCCmax
Input Capacitance
SCL Clock Frequency
Hold Time (Repeated) START
Condition. After this Period, the
First Clock Pulse is Generated
LOW Period of the SCL Clock
HIGH Period of the SCL Clock
Set-Up Time for a Repeated
START Condition
Data Hold Time
Data Set-Up Time
Set-Up Time for STOP
Condition
VIH
Vhys
VOL
tof
tSP
Ii
Ci
fSCL
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
SDA and SCL pins only
(Notes 10, 11)
(Note 10)
(Notes 12, 13)
(Note 14)
3 of 21
MIN
60
7.1
5.0
2.8
570
68.4
66.5
7.1
7.6
0.7
554.8
70.3
9.5
57
TYP
64
7.5
5.3
3.0
600
72
70
7.5
8
0.75
584
74
10
60
VCC –
0.5V
-0.5
0.7 ×
VCC
0.05 ×
VCC
60
-10
0
0.6
1.3
0.6
0.6
250
0.6
MAX
68
7.9
5.6
3.2
630
75.6
73.5
7.9
8.4
0.8
613.2
77.7
10.5
63
UNITS
µs
µs
µs
µs
µs
µs
µs
µs
0.4
V
V
0.25 ×
VCC
0.22 ×
V
VCC
VCC +
0.5V
V
V
0.4
V
250
ns
50
ns
10
µA
10
pF
400
kHz
µs
µs
µs
µs
0.9
µs
ns
µs
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