S29GL064N90BAI040(2007) Ver la hoja de datos (PDF) - Spansion Inc.

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S29GL064N90BAI040
(Rev.:2007)

64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology

Spansion Inc. 

Data Sheet

8.2.1

Page Mode Read

The device is capable of fast page mode read and is compatible with the page mode Mask ROM read

operation. This mode provides faster read access speed for random locations within a page. The page size of

the device is 8 words/16 bytes. The appropriate page is selected by the higher address bits A(max)–A3.

Address bits A2–A0 in word mode (A2–A-1 in byte mode) determine the specific word within a page. This is

an asynchronous operation; the microprocessor supplies the specific word location.

The random or initial page access is equal to tACC or tCE and subsequent page read accesses (as long as the

locations specified by the microprocessor falls within that page) is equivalent to tPACC. When CE# is

deasserted and reasserted for a subsequent access, the access time is tACC or tCE. Fast page mode

accesses are obtained by keeping the read-page addresses constant and changing the intra-read page

addresses.

8.3

Writing Commands/Command Sequences

To write a command or command sequence (which includes programming data to the device and erasing

sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.

The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the

Unlock Bypass mode, only two write cycles are required to program a word, instead of four. The Word

Program Command Sequence on page 42 contains details on programming data to the device using both

standard and Unlock Bypass command sequences.

An erase operation can erase one sector, multiple sectors, or the entire device. Tables 8.2 – 8.8 indicate the

address space that each sector occupies.

Refer to the DC Characteristics table for the active current specification for the write mode. The AC

Characteristics section contains timing specification tables and timing diagrams for write operations.

8.3.1

Write Buffer

Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming

operation. This results in faster effective programming time than the standard programming algorithms.

8.3.2

8.3.3

Accelerated Program Operation

The device offers accelerated program operations through the ACC function. This is one of two functions

provided by the WP#/ACC or ACC pin, depending on model number. This function is primarily intended to

allow faster manufacturing throughput at the factory.

If the system asserts VHH on this pin, the device automatically enters the aforementioned Unlock Bypass

mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the

time required for program operations. The system would use a two-cycle program command sequence as

required by the Unlock Bypass mode. Removing VHH from the WP#/ACC or ACC pin, depending on model

number, returns the device to normal operation. Note that the WP#/ACC or ACC pin must not be at VHH for

operations other than accelerated programming, or device damage may result. WP# contains an internal

pullup; when unconnected, WP# is at VIH.

Autoselect Functions

If the system writes the autoselect command sequence, the device enters the autoselect mode. The system

can then read autoselect codes from the internal register (which is separate from the memory array) on DQ7–

DQ0. Standard read cycle timings apply in this mode. Refer to Autoselect Mode on page 29 and Autoselect

Command Sequence on page 42 for more information.

18

S29GL-N MirrorBit® Flash Family

S29GL-N_01_09 November 16, 2007

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