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ATSHA204A-SSHCZ-T Datasheet PDF : 93 Pages
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ATSHA204A
General I/O Information
4. General I/O Information
Communication with the ATSHA204A is achieved through one of two different protocols (I2C or
Single-Wire) and is selected based on the device ordered:
• Single-Wire Interface
Uses a single GPIO connection on the system microprocessor connected to the SDA pin on the
device. It permits the fewest number of connector pins to any removable/replaceable entity. The bit
rate is up to 25.6 kb/s and is compatible with standard UART signaling.
• I2C Interface
This mode is compatible with the Microchip AT24C16 Serial EEPROM interface. Two pins are
required, Serial Data (SDA) and Serial Clock (SCL). The I2C interface supports a bit rate of up to
1 Mb/s.
The lowest levels of the I/O protocols are described in Section Single-Wire Interface and Section I2C
Interface. On top of the I/O protocol level, both interfaces transmit exactly the same bytes to and from the
device to implement the cryptographic commands and error codes documented in Section Security
Commands.
The device implements a failsafe internal watchdog timer that forces it into a very low-power mode after a
certain time interval, regardless of any current activity. System programming must take this into
consideration. See Section Watchdog Failsafe for details.
4.1
4.1.1
4.1.2
Byte and Bit Ordering
CryptoAuthentication devices use a common ordering scheme for bytes and also for the way in which
numbers and arrays are represented in this datasheet:
• All multi-byte aggregate elements are treated as arrays of bytes and are processed in the order
received or transmitted with index #0 first.
• 2-byte (16-bit) integers, typically Param2 appear on the bus LSB first.
The bit order is different depending on the I/O channel used:
• On the Single-Wire Interface, data is transferred to/from the ATSHA204A LSb first on the bus.
• On the I2C Interface, data is transferred to/from the ATSHA204A MSb first on the bus.
Output Example
The following bytes are returned in this order on the bus by a 32-byte read of the configuration section
with an input address of 0x0000:
SN<0>, SN<1>, SN<2>, SN<3>, RevNum<0>, RevNum<1>, RevNum<2>, RevNum<3>, SN<4>, SN<5>,
SN<6>, SN<7>, SN<8>, reserved, I2C_Enable, reserved, I2C_Address, OTPmode, SelectorMode,
SlotConfig<0>.Read, SlotConfig<0>.Write, SlotConfig<1>.Read, SlotConfig<1>.Write,
SlotConfig<2>.Read, SlotConfig<2>.Write, SlotConfig<3>.Read, SlotConfig<3>.Write,
SlotConfig<4>.Read, SlotConfig<4>.Write, SlotConfig<5>.Read, SlotConfig<5>.Write
MAC Message Example
The following bytes are passed to the SHA engine for a MAC command using a mode value of 0x71 and a
SlotID of slot x. In the example below, K<x> indicates the SlotID of slot x in the Data zone, with K<0>
being the first byte on the bus for a read from or write to that slot. OTP<0> indicates the first byte on the
bus for a read of the OTP zone at address zero and so on.
© 2018 Microchip Technology Inc.
DS40002025A-page 20
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