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MK10DX64ACLF10

K10 Sub-Family

NXP Semiconductors. 

6.6.3.2

Peripheral operating requirements and behaviors

12-bit DAC operating behaviors

Table 33. 12-bit DAC operating behaviors

Symbol Description

IDDA_DACL Supply current — low-power mode

P

IDDA_DACH Supply current — high-speed mode

P

tDACLP Full-scale settling time (0x080 to 0xF7F) —

low-power mode

tDACHP Full-scale settling time (0x080 to 0xF7F) —

high-power mode

tCCDACLP Code-to-code settling time (0xBF8 to 0xC08)

— low-power mode and high-speed mode

Vdacoutl DAC output voltage range low — high-speed

mode, no load, DAC set to 0x000

Vdacouth DAC output voltage range high — high-

speed mode, no load, DAC set to 0xFFF

INL Integral non-linearity error — high speed

mode

DNL

Differential non-linearity error — VDACR > 2

V

DNL

Differential non-linearity error — VDACR =

VREF_OUT

VOFFSET

EG

PSRR

TCO

TGE

Rop

Offset error

Gain error

Power supply rejection ratio, VDDA > = 2.4 V

Temperature coefficient offset voltage

Temperature coefficient gain error

Output resistance load = 3 kΩ

SR Slew rate -80h→ F7Fh→ 80h

• High power (SPHP)

• Low power (SPLP)

Min.

—

—

—

—

—

—

VDACR

−100

—

—

—

—

—

60

—

—

—

1.2

0.05

Typ.

—

—

100

15

0.7

—

—

—

—

—

±0.4

±0.1

—

3.7

0.000421

—

1.7

0.12

Max.

330

1200

200

30

1

100

VDACR

±8

±1

±1

±0.8

±0.6

90

—

—

250

—

—

Unit

μA

μA

μs

μs

μs

mV

mV

LSB

LSB

LSB

%FSR

%FSR

dB

μV/C

%FSR/C

Ω

V/μs

Notes

1

1

1

2

3

4

5

5

6

CT Channel to channel cross talk

BW 3dB bandwidth

• High power (SPHP)

• Low power (SPLP)

—

—

-80

dB

kHz

550

—

—

40

—

—

1. Settling within ±1 LSB

2. The INL is measured for 0+100mV to VDACR−100 mV

3. The DNL is measured for 0+100 mV to VDACR−100 mV

4. The DNL is measured for 0+100mV to VDACR−100 mV with VDDA > 2.4V

5. Calculated by a best fit curve from VSS+100 mV to VDACR−100 mV

6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set

to 0x800, Temp range from -40C to 105C

K10 Sub-Family Data Sheet, Rev. 3, 6/2013.

Freescale Semiconductor, Inc.

49

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