LTC6991HS6-TRPBF Ver la hoja de datos (PDF) - Analog Devices
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LTC6991HS6-TRPBF Datasheet PDF : 24 Pages
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LTC6991
APPLICATIONS INFORMATION
V+
R1
R2
C1
V+
DIV
SET
RSET
RST
OUT
LTC6991
GND
V+
SET
DIV
RSET
OUT
GND
RST
DFN PACKAGE
C1
0.1µF
V+
R1
R2
C1
V+
RST
GND
SET
RSET
OUT
V+
DIV
R2
R1
6991 F18
TSOT-23 PACKAGE
Figure 16. Supply Bypassing and PCB Layout
Supply Bypassing and PCB Layout Guidelines
The LTC6991 is a 2.2% accurate silicon oscillator when
used in the appropriate manner. The part is simple to use
and by following a few rules, the expected performance
is easily achieved. Adequate supply bypassing and proper
PCB layout are important to ensure this.
Figure 16 shows example PCB layouts for both the TSOT-
23 and DFN packages using 0603 sized passive compo-
nents. The layouts assume a two layer board with a ground
plane layer beneath and around the LTC6991. These lay-
outs are a guide and need not be followed exactly.
1. Connect the bypass capacitor, C1, directly to the V+ and
GND pins using a low inductance path. The connection
from C1 to the V+ pin is easily done directly on the top
layer. For the DFN package, C1’s connection to GND
is also simply done on the top layer. For the TSOT-23,
OUT can be routed through the C1 pads to allow a good
C1 GND connection. If the PCB design rules do not
allow that, C1’s GND connection can be accomplished
through multiple vias to the ground plane. Multiple
vias for both the GND pin connection to the ground
plane and the C1 connection to the ground plane are
recommended to minimize the inductance. Capacitor
C1 should be a 0.1µF ceramic capacitor.
2. Place all passive components on the top side of the
board. This minimizes trace inductance.
3. Place RSET as close as possible to the SET pin and
make a direct, short connection. The SET pin is a cur-
rent summing node and currents injected into this pin
directly modulate the operating frequency. Having a
short connection minimizes the exposure to signal
pickup.
4. Connect RSET directly to the GND pin. Using a long path
or vias to the ground plane will not have a significant
affect on accuracy, but a direct, short connection is
recommended and easy to apply.
5. Use a ground trace to shield the SET pin. This provides
another layer of protection from radiated signals.
6. Place R1 and R2 close to the DIV pin. A direct, short
connection to the DIV pin minimizes the external signal
coupling.
6991fc
18
For more information www.linear.com/LTC6991
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